Solder Defect

Folks,

I’m taking a few moments from Wassail Weekend , held annually in my village, Woodstock VT, “The prettiest small town in America”, to write a post about last week’s workshops at ACI.

Indium colleague Ed Briggs and I gave a 3 hour presentation on “Lead-Free Assembly for High Yields and Reliability.” I think Ed’s analysis of “graping” and the “head-in-pillow” defect is the best around. 

There was quite a bit of discussion on the challenges faced by solder paste flux in the new world of lead-free solder paste and miniaturized components (i.e. very small solder paste deposits.) One of the hottest topics was nitrogen and lead-free SMT assembly. There seemed to be uniform agreement that solder paste users should be able to demand that their lead-free solder paste perform well with any PWB pad finish (e.g. OSP Immersion silver, electroless nickel gold, etc.) without the use of nitrogen. Not only does using nitrogen cost money, but it will usually make tombstoning worse. However, in the opinion of most people, nitrogen is a must for wave soldering and, since it minimizes dross development, it likely pays for itself.

After Ed and I finished, Fred Dimock, of BTU, gave one of the best talks I have ever experienced on reflow soldering. He discussed thermal profiling in detail, including the importance of assuring that thermocouples are not oxidized (when oxidized they lose accuracy). He also discussed a reflow oven design that minimizes temperature overshoot during heating, and undershoot when the heater is off. Understanding these topics is critical with the tight temperature control that many lead-free assemblers face.

Fred Verdi of ACI finished the meeting with an excellent presentation on “Pb-free Electronics for Aerospace and Defense.” Fred’s talk discussed the work that went into the “Manhattan Project.” A free download of the entire project report is available.

There appears to be agreement that acceptable lead-free reliability has been established for consumer products with lifetimes of 5 years or so, but not for military/aerospace electronics where lifetimes can be up to 40 years in harsh service conditions. These vast product lifetime and consequences of failure differences are depicted in the Fred's chart (above). Commercial products are in quadrant A and military/aerospace products in quadrant D.

One of the greatest risks faced by quadrant D products is tin whiskers. Fred spent quite a bit of time discussing this interesting phenomenon. One of the challenges of this risk is that there is no way to accelerate it, so you can’t do an equivalent test to accelerated thermal cycling or drop shock. Fred mentioned that there have now been verified tin whisker fails, the Toyota accelerator mechanism being a confirmed one.

In addition to tin whiskers, lead-free reliability for quadrant D products (with a service life of up to 40 years) in thermal cycle and other areas remains a concern.  I mention that tin pest was not on the list of issues for this quadrant.

Fred and the Manhattan Project Team have identified many "gaps" that need to be addressed to determine and mitigate the risk of lead-free assembly for quadrant D products.  They plan to start this approximately $100M program in 2013.

For those that missed this free workshop, ACI host Mike Prestoy is planning another one in 6 months.

Cheers,

Dr. Ron

Tombstoning

• the transition to Pb-Free (higher reflow temperatures, and related flux issues)
• miniaturization (0201s and 01005s)

• The reflow oven operator can slow down the ramp rate. A slower ramp rate allows for more uniform warming of the PCBA.
• Another technique is to employ a "soak" just below the melting temperature (solidus) of the alloy. For example, for a SAC305 profile (217°C solidus), one may implement a "soak" at 205 to 210°C for 30 to 120 seconds. This allows for the cooler parts of the PCBA to "catch up" to the warmer parts. After thermal equilibrium has been achieved, one can spike the temperature up to the appropriate peak temperature (i.e. 245°C). This technique (depicted in the reflow profile shown at the right) allows for all of the solder paste deposits to melt and wet the component terminations at roughly the same time; thereby, mitigating tombstoning.

Phone: +1.315.853.4900
E-mail: ebastow@indium.com

Folks,

Let's look in on Patty......

Patty was just finishing a report on work that she and Pete had performed with a team of her ACME colleagues  on reducing the Head-in-Pillow (HIP) defect at a plant in Minnesota. HIP can be caused by printed circuit board and/or a BGA warping during reflow, and, occasionally, by poor wetting BGA solder balls. Fortunately, this case of HIP was due to just a little warping, so replacing the solder paste with one of the new formulations that was designed to minimize HIP had done the trick. Ten thousand boards were produced with no detectable HIP defects.

As Patty wrote the last sentence in the report, she gazed out the window at the dusting of snow that had fallen. She liked living in southern New Hampshire and was thrilled with the house that she and Rob had purchased six months ago in Exeter.  She had to admit that Phillips Exeter Academy was also a draw. She hoped her 18 month old sons, Michael and Peter, would attend high school there, when the time came.

Patty was jarred from these thoughts by the ringing of her phone. She looked at the caller ID and saw that it was Mike Madigan, the CEO of all of ACME. Her stomach tied up in a knot. Sam, her boss, had alluded to the fact that senior management wanted to make her a VP. He asked if she had any requirements to accept such an offer. She said that she wanted to stay located where she was and she wanted Pete to be on her staff. Still, she was a bit nervous about such a big change.

“Patty Coleman, how may I help you?” Patty answered.

“Coleman, this is Mike Madigan. Congratulations, you are our new VP of Technology and Productivity. You will report to me, but, since you are staying in New Hampshire, I want you to report dotted line to Sam for day-to-day things. Coleman, don’t let me down. You are the youngest VP in the history of ACME by 5 years,” Madigan said.

Patty was a little put off by his gruff manner, but had been told to expect it.

“Thank you Mister Madigan, I’ll do my best,” Patty responded.

“I already have an assignment for you,” Madigan went on.

“You have done great things by improving line uptime at many of our sites, and profitability is up everywhere, but I sense we are still missing something. Do you know why?” he asked.

“Because the correlation between profitability and uptime is not as strong as one would like?” Patty asked.

“Coleman, I’m already glad I promoted you! That is exactly my concern.   Explore the situation, fix it and give me a better metric. I want all sites to use this new metric so I will know which locations to focus on. I want a status report in 3 weeks.” Madigan finished.

“I'll get right on it Mister Madigan and will have an update in 3 weeks or sooner,” Patty answered, exhilarated, but a little shaky.

“Good! Oh and Patty, call me Mike. It’s not the 1960s you know,” he chuckled as he hung up.

Patty hung the phone up feeling happy and stressed. She was glad to get the promotion, but knew she had to deliver.

Patty had thought about this productivity metric concern in the past. She knew where to start, she would call The Professor. She was surprised when he picked up on the first ring.

“Patty, it’s great to hear from you. How are Rob and the boys? We expect to see your sons here at Ivy University as students in 16 years,” The Professor chuckled.

After exchanging a few more pleasantries and sharing the news about her promotion, Patty got right to the point.  

“Professor, I need a metric that measures total productivity in electronics assembly. Uptime is a great metric, but it doesn’t correlate one-to-one to profitability,” Patty explained.

Patty expressed her surprise that no metric for total productivity was in wide use. They discussed the issue for a few more moments and then The Professor had a recommendation. “Read the NEMI (National Electronics Manufacturing Initiative) 1998 and the iNEMI 2011  Technology Roadmaps. Focus on board assembly and I think you will find your answer,” The Professor suggested.

After a few more pleasantries, The Professor had a request.

“Patty, I am getting a little award in Washington, DC. I have room for two guests at the award presentation. I was hoping you and Rob would come,” The Professor requested.

Patty said she would check their schedules, but was sure it would work out. She was honored that he thought so much of her and Rob.

As she hung up the phone, she went to ACME’s Tech Library in search of the iNEMI roadmaps. She quickly found the 1998 NEMI Technology Roadmap, but unfortunately only a summary of the 2011 iNEMI Roadmap was available. She thought she would read the 2011 Roadmap summary first. It was overwhelmingly impressive in its coverage of technology, at the wafer, chip, component, and board levels. The thoughtful inputs of over 575 participants, from over 310 organizations, were clearly evident. All of the current and emerging technologies were presented in detail.

“What a treasure of information,” Patty thought.

But she didn’t see an answer to her question.

So she went to the “Board Assembly” section of the 1998 Roadmap and in a few minutes she saw the answer: Board Assembly Conversion Cost in cents/I/O.

“What a simple concept,” she thought.

As she studied the document it became clear that about 30% of it focused on reducing conversion costs. Conversion costs were defined as all of the cost of assembly minus materials cost. To give this metric meaning, to enable comparisons between different manufacturing sites, the total amount of conversion cost for a manufacturing site was divided by the total number of input/output (I/O) terminals (i.e. component leads) assembled.

“This makes sense,” she thought. “You add up all of the non-material costs of assembly and divide by all of the leads you assemble. This metric shows how efficiently you assemble each lead.”

It then dawned on her that she had seen a metric like this before. She saw the notebook from The Professor’s workshop on Cost Estimating in her bookcase.  She grabbed it and flipped through it. There it was: non material assembly cost per I/O (NMACIO).

The great mystery to her is why the folks at NEMI didn't emphasize these types of cost performance metrics in newer roadmaps.

Folks,

The Guadalajara (GDL), MX Chapter of the SMTA held their first meeting on November 9 and 10 at CETI in GDL.
Approximately 70 engineers from local companies attended. It was a great success. 

The agenda was:

November 9^th, 2011

0830-0900am    Registration and Exhibits Open

0900-0915am    Welcoming Remarks and Exhibition starts

0915-1045am    Inventec: “Reliability Assessment regarding Flux residues"

1045-1215pm    Sanmina-SCI: “Capabilities of a Failure Analysis Lab”

1215-1315pm    LUNCH

1315-1445pm    DEK: "Optimizing the Print Process for Mixed Technology"

1445 -1615pm   Vitronics Soltec: “How to Choose a Robust Configuration for Equipment
                          for Defect Free Soldering - Reflow, Wave and Selective”

1615-1745pm    KIC: “Fixing Reflow and Wave Related Defects as Well as How to Avoid 
                          Them in the First Place”

 November 10^th, 2011

0900-1030am    Sanmina-SCI: “Process development of 01005 components”

1030-1200pm    Indium: "Lead-Free Assembly for High Yields and Reliability."

1200-1300pm    LUNCH

1300-1430pm    Universal Instruments: "Tutorial on Failure Analysis"

1430-1600pm    Zestron: “PCB cleaning before conformal coating”

1600-1730pm    Kester: “Understanding Soldering Chemistries - Reducing Costly
                          Defects, Increasing Yields and Reliability.

I spoke on “Lead-Free Assembly for High Yields and Reliability." We had several raffles and gave away autographed copies of my book “The Adventures of Patty and the Professor,” which has just recently been formally published. 

As usual, I had dinner at Santo Coyote, one of my favorite restaurants, however my Mexican friends also took me to Sacromonte, claiming it had better food. They were correct. I was convinced to try chicken mole which I liked. It is tough to beat Santo Coyote’s ambiance, however.

I can’t cite data for this, but I am quite sure that GDL has the largest number of workers in electronics assembly outside of Asia. It is great news that they now have an SMTA chapter to help the local engineers network and continue to grow in their skills.  It was great to play a small part in this success, but most of the credit must go to Indium Corporation’s Ivan Castellanos who is chapter president and Kester’s Miguel Vazquez, chapter vice president.

Cheers,

Dr. Ron

Folks,

I met Peter Borgesen back in the mid 1980s when he was a research scientist at Cornell working with Professor Che-Yu Li. Later we worked together at Universal Instruments. Currently Peter is a Professor a Binghamton University.  All during this time, Peter has been working on materials science-related topics in electronics packaging and assembly, most notably reliability. In addition to his many technical skills, he is a gifted linguist, speaking multiple European languages. Etched in my mind is Peter talking to several European graduate students in their native European languages in the space of 5 minutes, switching from one to the other effortlessly.

Few people know more about lead-free solder reliability than Peter. So I thought I would get his perspective on my recent post on lead-free field reliability data. His comments follow.

Hi Ron,

I agree that the sky is not falling. Also, we should be talking much more (only?) about life in service. I realize that we don't know enough about this (and our predictions based on test results are much more off than people want to recognize). The vast majority of practitioners focusing on 'engineering tests' are doing worse than wasting time and effort if comparisons of test results do not translate to relative performances in service. There is a lot of ‘sticking heads in the sand’ here.

I am not concerned about the long term life of cell phones, and not very worried about in which respect they do better or worse in service than with SnPb. Intermetallic bonds have generally gotten weaker and more prone to sporadic defects, and cratering is greatly enhanced for the devices Vahid Goudarzi mentions when discussing Motorola field data. I agree those are limited concerns, no sky falling indeed.

What still scares me (in the case of critical applications) or concerns me (in the case of expensive applications) is the naivete with which many seem to think we can learn much about sporadic disasters or long-term reliability of those from consumer electronics experiences.

I am not often interested in comparisons to actual life of SnPb either (any more). We face ever more applications (designs and service conditions) for which we don't have sufficiently accurate critical experience with SnPb either. The first challenge becomes not to be surprised by effects of long-term aging, combinations of loading, minor differences in pad finish, joint configuration, latent damage, process, .... and their interactions for the specific solder alloy used (!).

While I can't yet extrapolate test results to life in long-term service (I think we are close, but I really need an extra $1M to prove my hypothesis and turn it into a quantitative model) I can show how current models may easily be off by 2-3 orders of magnitude or more (worse, how they may screw up comparisons of alternatives). It obviously depends on the application whether this really matters (I side with companies who have cut drastically back on testing for many applications).

Keep up the good work.

Peter

I will keep in touch with Peter in the future for updates on his perspective.

Cheers,

Dr. Ron

Example:

Figure 1: Example shown Indium8.9 flux with SAC lead-free alloy

The reason for approaching this subject is that often there has been some confusion in regards to the difference between max slope (a category reported on most profiling software) and the ramp rate listed on a data sheet.
























Figure 2: Max Slope

The max slope is very often attained in the first zone as the PCB moves from ambient temperature into the oven. In most cases the oven zone setting for the first zone is 100°C or better. The change in temperature between ambient and the first zone then is a minimum of 75°C (assuming 25°C as ambient) and so it’s easy to see that the greatest change in temperature (max slope) in most cases is typically found in the first zone

The focus of max slope is more from a component view point, to avoid thermal shock, usually 3°C/s is recommended as the upper limit

Figure 3: Ramp or Average Rate


The ramp rate may be better described as the rate (change in temperature over time) from ambient (room temperature) to peak. And is more practically used in a ramp to spike type profile

From the view point of the solder paste, the lower the ramp rate the better, usually 1-2°C/s. This is to drive off volatiles and help minimize solder defects such as solder balling, solder beading, and tombstoning. This rate becomes even more important as the solder paste deposit continually decreases in size, as we move to 0201’s and smaller discrete components and from 0.5mm pitch area array packages to 0.4mm and smaller. Due to this miniaturization, the observance of graping and head-in-pillow have become more common. The reflow process window is becoming very narrow and this attribute (ramp rate) has become as important as time above liquidus and peak temperature.

I'd love to discuss this with you, if this topic is affecting your SMT process. If you'd like, feel free to contact me.

我自己是一个电子焊接材料销售人员，虽然是B2B，但是生活中当我评估B2C的销售人员时，也常常想到自己的客户们……最近我们想把花园里的一棵斜树砍了，朋友介绍了他曾经用过的4家公司。于是我逐一联系比较。

第一家：没人接电话，留言了也一直没有回复。---客户服务不及时，比较差，不考虑了。

第二家： 一个老头接了电话，我们约好了时间来看树。老头准时出现在我家门口，整齐的穿着，礼貌亲善的销售，职业的打招呼和握手。看了树，问了我的需求后，他用专业的纸条写下了情况和报价，并详细解释了我对砍树的一些问题：几个人来砍，时间多长，有多复杂等。 此外，他还适当“销售”了一下自己和自己的公司： 经验丰富，口碑好等。最后，老头留下了自己公司的保险和营业执照等信息，就礼貌职业地握手离开了。--- 这一家总体感觉不错；但是我不知道他的价位是否合理，再比比看。

第三家：没人接电话，于是留言了；第二天一个年轻人回复了并来看树了。礼貌职业的握手，但是全身十分肮脏的穿着（或许他刚给别人砍完树吧）。年轻人看了树后，报价了；价格区间和第二家老头的不相上下。但是当我问到砍树的一些细节时，他的回答和老头的回答有比较大的差别（这些差别让我感到他是故意在显得自己的报价已经是相当的实惠了）。后来我说我会考虑的，因为我还在货比三家，年轻人显得有点点急了，说他可以明天就来完工，还问我找了哪几家…..最后他还是职业礼貌地离开了；没有留下报价单或是其他信息。---总体感觉一般；虽然待客户比较职业，但是少了老头那种特别专业和比较从容、真诚做生意的感觉。价格区间既然和老头那家差不多，就应该是这个范围了。

第四家---电话约好了时间，但是一个中年人提早了1个半小时就来敲门了，说他自己在同一时间被安排2个客户，所以只能提早到我这里（但是为什么没有任何提前通知呢？万一我不在家呢？）。没有因为提前的抱歉，没有职业的招呼。他看完树后，表现出很难办的感觉，并开了一个天价。 我说再想想吧，那个中年人居然什么都没有说，头也不回地甩门就走…… --- 看来是没有最差，只有更差啊！

我录用了第二家老头的砍树公司。联想一下自己平时做电子焊接材料(Electronic Solder)销售，代表的不仅仅是个人，更是整个公司在客户面前的形象，我自己做到以下这些基本的要求了吗？

---能否完成这项工作。我联系的这四家公司是朋友曾经用过并推荐的，起码都完成过砍树工作。 如果换成是Indium的产品，那么就是我们产品的质量好坏(Product Quality)，以及产品质量的稳定性(Product Quality Consistence)。这对客户们的产率(Yield Rate)和不良率(Defect Rate) 都有很大的影响。而我作为销售，对自己公司的产品了解吗？有信心吗？这些，都会在和客户交流的过程中潜移默化地表现出来的。

---基本的销售要求 (Basic Sales Requirement): 认真准备，准时，有礼貌，打招呼，整齐的穿着等。

---销售的技巧(Sales Skills): 是否了解客户的真正需求而有针对性的销售；是否有销售的工具协助；是否会“过犹不及”或是没有给客户全面的有用的信息等。(Goal Oriented---Begin With The End!)

---客户服务和支持(Customer Service & Support): 及时准确地给客户信息回馈和支持。

---其他：价格，客户关系和客户关系的维系（特别是对于B2B的客户来说），公司的形象、口碑和声誉等等……  

时常对照反省，自勉之。

Cheers!

Pic:Google Image

随着电子元器件组装微型化的趋势(miniaturization)，最近有越来越多的客户向我们咨询叠成封装的材料以及相关工艺(Package-on-Package；PoP)。

在向客户推荐PoP材料的时候，除非客户已经十分清楚自己要什么，我们一般会和他们详细介绍叠成封装焊锡膏PoP paste 和叠成封装助焊剂PoP flux具体是什么，分析各自的优缺点，然后让客户自己做决定。

Indium 公司的PoP paste (Indium9.88HF) 用的是5号金属粉，金属比重大概在80%-83%之间，根据是有铅还是无铅而定。 我们做过一系列的实验，和常规的SMT 3号粉和4号粉，各种金属比重的焊锡膏做比较，用5号粉在这个金属比重中做出来的PoP paste，各方面的性能最好。 Indium公司的PoP flux (Indium 89HF-LV) 也是根据各种实验结果都是最好的证实后， 才推出的。 通常检测PoP焊接材料， 可以做这三个实验： Transfer Test, Wetting Test, and Electrical Test. 具体的检测方法，Indium公司的Jim Hisert在他的论文中有详细描述。《Next Generation PoP Pastes for Electronics Assembly》

一般我个人比较喜欢推荐PoP paste，因为PoP paste能够提供extra solder。 PoP component本来就很薄，在焊接后回流的过程中十分容易“warpage 板翘”，那么component边缘部分就很有可能有一个上下之间很大的gap，导致根本无法形成良好的焊点。但是如果使用优良的PoP paste, paste中的extra solder metal 就能起到一个很好的“粘合剂”作用，即使有warage，也可以有一定的防御。 但是PoP flux在这方面就相对弱一点。

然而，PoP paste中的flux，因为要做很多功夫来清洗powder表面的氧化物，所以在回流过程中会有挺多的outgassing，这就很有可能导致空洞voiding 的产生。PoP flux相对而言，outgassing 就少很多，自然产生voiding的几率也小。

无论如何，优良的PoP paste and PoP flux，在防止wargage和voiding产生的defect方面，都是应该做得不错的。

Cheers!

Pic: Indium Corporation

Acknowledge to: Eric Bastow andJim Hisert with Indium Corporation  

Folks,

I thought I would take a stab at listing the minuses, pluses, and “it’s a wash” aspects of assembling with lead-free (LF) solder. Here are my first thoughts. Please tell me what I missed or disagree.

Cheers,

Dr. Ron

Minuses

1.    Pb-Free requires higher reflow temperatures
The Tm for LF solders, in the 217-229C range, has created numerous challenges:

a.      PWB warpage and damage

b.      Component damage

c.      New defect modes such as graping and head-in-pillow defects (although concurrent reduction in solder paste deposit sizes for 0201 and 01005 passives and 0.3 mm CSPs also exacerbate these defects)

d.      Defects related to increased oxidation

e.      Increases in voiding

f.       Increases in tombstoning

2.      The higher cost of LF solder, mostly for wave soldering

a.      It’s not just the silver, tin is much more expensive than lead

3.      Poorer wetting of LF solders, creating the most significant challenges in wave soldering

4.      More rapid copper pad dissolution on PWBs in wave soldering

5.      LF solder attack of wave solder machine components

6.      LF reliability in harsh thermal cycle testing appears poorer than tin-lead solders

7.      Tin Whiskers

It’s a Wash

1.      Short-term reliability in consumer product-type environments

2.      Protection of the environment if discarded products are improperly disposed of

a.      Lead in electronics has never been shown to cause a problem in land fills

3.      Since July 2006, about $3 trillion of products have been manufactured with LF solder, with no “the sky is falling”-type of problems

Pluses

1.      LF solder's poor wetting enables finer lead spacings (see photo Courtesy of Motorola)

a.      It may be argued that some modern electronic products (e.g. smartphones) could not be made with tin-lead solder

2.      It is safer to recycle LF solders, especially if performed in a non-controlled environment

Conformal coating compatibility with no-clean flux residues has been a major topic for years – becoming even more popular recently with companies looking to cut manufacturing costs and processes.

Unfortunately, no industry standards definitively determine or define “compatibility” between conformal coating materials and no-clean flux residues. This does not mean that people are always automatically cleaning the flux residues before conformal coating their boards. Nor does it mean that most people are shooting in the dark with their decision to clean or not. I have a number of customers who conformally coat over no-clean flux residues, smart customers who have taken the time to do their due diligence and create their own standards and test methods to determine compatibility. These companies also run the tests and apply their standards on their materials.

Here at Indium Corporation we look at materials compatibility from three different viewpoints:

The first is the simplest: visual appearance. Does the coating look like it has adhered to the board, components, and/or flux residue? A lack of adhesion will usually result in bubbles, crazing, and a number of other visual defects or anomalies.

The next step/test that could be taken to determine compatibility would be to measure actual adhesion. “Tape Tests” are often used to measure adhesion. However, these Tape Tests all have a number of imperfections and variables that accumulate to result in a lack of both accuracy and repeatability. For example, many of these Tape Tests are very operator dependent and rely upon the speed at which the tape is removed, the angle at which it is removed, the force in which it is removed, etc. Different operators can, and do, have very different results. Tape Tests are also dependent on the tape. Variables include: age, shelf life, tack strength, adhesion to certain materials, tape brand, tape width and/or length, even test temperature. Another issue with this method has to do with the conformal coating material. What happens when the conformal coating material is a silicone? There isn’t much that will stick to a silicone, so using the Tape Test with this material is probably worthless. Here are several Tape Test procedures that are present within the industry:

• ASTM D 3359-02
• IPC-TM-650 method 2.4.28.1F
• IPC-TM-650 method 2.4.26

Note that the ASTM test method neuters itself by stating all the possible flaws that could be present.

The third viewpoint is electrical reliability using Surface Insulation Resistance (SIR). Even this is not easy to conclusively determine because there are two different test methods for SIR. One each for:

• No-clean fluxes IPC-TM-650 method 2.6.3.3B
• Conformal Coatings IPC-TM-650 method 2.6.3.4A

Another issue with SIR testing involves 3D parts. The National Physical Laboratory (Britain) and the SMART Group (a British trade association) have been trying to conquer these SIR challenges for years. They do have a draft of a standard written, but nobody wants to stick their neck out, without further testing and proof, to release this standard; so it has been in limbo for quite some time. For further reading on this topic, read this paper, authored by my colleague Andy Mackie and me. It provides further insight into the issues that our industry is facing with regard to compatibility. Note the chart, in this paper, that highlights the differences between the two IPC SIR test methods.

Now that you know Indium Corporation’s position on conformal coating compatibility with no-clean flux residues, it is time to consider the point of view of the companies who manufacture and supply conformal coatings. The majority recommend that, when in doubt, clean the no-clean flux residue before conformally coating. This takes any and all of the guessing out of the equation.

As stated earlier, there are companies that conformally coat over no-clean flux residues with success. Some of these companies are very successful and well-known aerospace, automotive, and military organizations. I am sure they have created their own standards and test methods to mitigate risk and doubt, while assuring performance and reliability. Unfortunately, they have not yet shared their methods and/or experiences with the rest of the industry, so we cannot yet use their expertise to guide us as we converge on one industry standard. If you are one such organization, I’d love to hear from you.

We have not done much work with conformal coating “compatibility” trials due to the vast number of conformal coating materials commercially available and the vast number of no-clean flux formulations that we offer. Even if there were a standard that would define what it means to be “compatible”, the sheer number of conformal coating products, when combined with the sheer number of no-clean solder fluxes, creates an extremely large matrix of necessary tests.

In conclusion: When in doubt, clean.

If you have any other questions or concerns please feel free to contact me at any time.

Tombstoning, simply, is the wetting of one side of a component before the other side, which causes the setting forces of the solder to lift the component like a drawbridge.  Sometimes, it even cause the component to complete stand, like a tombstone.

There are several ways to counteract whatever cause is making the defect occur.  All of them include either getting the component to come to the same temperature at the same time, or allow for flexibility in the melting point of the solder during reflow.

Below are some ideas on how tombstoning can be eliminated.

 

1.   Eliminate Nitrogen reflow - Nitrogen reflow prevents the additional build up of new oxides on surfaces and the solder alloy, and allows more activator to be used for wetting, increasing the wetting force.

2.   Lower the delta-T across the board and component to <10°C -  This allows for more stable temperatures through liquidus, which equalizes the wetting on both sides of the affected components.

3.   Slowing the ramp rate of the components through reflow to ~0.5°C/s - This allows both sides of the component to come to temperature simultaneously.

4.   Introduce an anti-tombstoning alloy, such as the Ind100 (62.6Sn 37Pb 0.4Ag, which has a 4-6°C plastic range.

5.   Increase placement pressure and depth, which uses the tackiness of the paste to hold the component in place.

6.   Proper placement ensures that the component is centered between the pads.

7.   Stencil design ideas, such as home plate or reverse home plate, takes advantage of the alloy’s wettability and uses it to your advantage to solder the part to board, rather than using the wetting of the alloy to lift the part.

8.  Ensuring proper board and Pad design makes sure that there is not solder-robbing, where the solder flows along a trace, and doesn’t leave enough for the component.

 

I just visited a customer that was converting from water soluble solder paste to no-clean. Not exactly a slam dunk transition as this customer found out.

During my visit, solder balls and solder beads were observed in the no-clean flux residue adjacent to discrete components (capacitor/resistors). These could potentially be a reliability concern…electrical shorts.

In water soluble processes, solder defects such as solder balling and beading can be washed away in the cleaning process…no worries. However, introducing a no-clean solder paste often requires that the process be “cleaned” up a bit. Here are some ways to do it:

STENCIL DESIGN:
My first step was to investigate the stencil design for these discrete components. Why? Because, since water soluble post-reflow residues (including solder balls & beads) are washed away, many customers will opt to place as much solder (1:1 ratio) as possible on the pads - to achieve a good solder joint. This is especially true for military or medical applications where a robust solder joint fillet is vital. However, because no-clean residues are typically not cleaned, the solder balls and solder beads remain in the flux residue and may produce electrical shorts.

When printing in a 1:1 ratio, especially if the stencil is thicker than average, solder paste is often pushed under the component and onto the solder mask during component placement. Upon reflow, the sub-component solder paste may not pull back into the solder joint. This is one way that solder balls/solder beads are produced.

No one wants to hear that they need to buy new stencils with reduced apertures, but I did recommend, in this case, that some aperture reduction be considered (generally down to 0402 components). Usually a 10-15% reduction, with home-plate or similar design, is common. Many stencil manufacturers are fully aware of the issue and can make suggestions on aperture designs.

REFLOW PROFILE:
Simultaneously, the reflow profile often needs to be adjusted. In the preheat portion of the typical reflow profile, the first few oven zones are used to drive off flux volatiles, making the paste less "mobile". A balance in the ramp rate is vital; too fast - and small “explosions” may cause paste to spatter into other areas; too slow - and two bad things happen: the flux will spread excessively and the flux activity can be exhausted.

Good Starting Points:

• Ramp rate (IMPORTANT: not max slope, see "Best Practices Reflow Profiling for Lead-Free SMT Assembly" for reference): 1°C/s
• Initial first zone setting: 100-110°C

Recently I was at a customer who reported that their SMT components were “blowing off” their PCB. In most of the instances the component was still on the PCB but completely off pad.

Further investigation showed that the solder paste print for the component was well defined and that the component, after pick-and-place, was not skewed but placed correctly within the paste deposit.

Inspection of the oven revealed there were no obstructions on the conveyor and that the conveyor did not vibrate or shake excessively during reflow. The static pressure (air flow within the oven) was set at a low pressure.

The reflow profile used was a ramp to peak type profile, peak and time above liquidus was well within paste spec limits, but the initial (first zone) was set at a low temperature, ~70°C.  After changing the first zone to 100°C the issue was resolved.

Solder paste flux chemistries are unique, performing a number of functions including printability and retention of the shape of the stencil aperture they are printed through. These flux chemistries include ingredients that you don’t find in a simple liquid flux. Because of this the reflow profile plays a very important roll. In the first heating zones the solvent in the flux chemistry needs to evaporate increasing the tack of the solder paste (ability of the paste to hold onto the component). At 70°C the solvent does not evaporate quickly enough, a minimum of 100-110°C is recommended.

Note that setting the first zone too high (>130°C) can cause solder defects such as solder balling and solder beading

• Oxidation Barrie能夠大大減少，甚至完全消除枕窩效應(Head-in-Pillow defect). 枕窩效應是因爲BGA球和solder paste在回流前的preheat or soak time階段分開了，在熔融過程中，表面被氧化；儅BGA球和paste再次接觸時，表面被氧化層太厚了，所以整個焊點沒有完全融合好。如果有良好的Oxidation Barrier, 那麽能大大減少BGA球或是paste在熔融過程中因爲分開而被氧化。
   
• Oxidation Barrie 能夠提高精密元器件，小開口印刷的焊點的結合。小開口的下錫中，4號錫粉的表面積(powders’ surface area)其實是比3號粉增加了，但是助焊劑(paste flux)沒怎麽增加，那麽在焊接過程中，有些錫粉表面的氧化物可能就沒有被完全清洗乾淨。被氧化的錫粉不能和整個焊點完全融合，形成良好的焊接點；而是在焊點附近出現一串像葡萄一樣的小珠子，我們也叫做graping defect。 有了好的Oxidation Barrier, 就能夠更有效地預防graping defect, 提高小開孔印刷焊點的融合。
   
• Oxidation Barrie能夠減少留在電路板上的活化劑activator，增強電性能的可靠性。Oxidation Barrie 能夠防止焊接表面被氧化，activator是清洗表面被氧化的部分。如果有了良好的Oxidation Barrier，那麽activator 就可以相對減少。回流后留在電路板上的activator 也少了，那麽也減少short cut 等現象，提到電性能可靠性。
   

Cheers!

Pic: Indium Corporation

Folks,

Answers to the quiz of a few weeks back......

Phil and Rob had agreed to ask the GM if it was OK to ask the tech and engineers at some of their subcontractors to take the test anonymously. Over a period of two months Phil and Rob got 52 people to agree, almost all of them after Phil or Rob agreed to take them to lunch. They asked Patty to grade the “exams.” Today Patty would reveal the results.

“Phil, this is one of the best bets I have ever made,” teased Rob.

Everyone at the lunch table chuckled, but the look on Phil’s face said he expected to lose. Rob has said that he thought the average score would be less than 70%, Phil insisted that it would be greater than 85%. In asking the different folks to take the test, invariably Phil started asking questions not on the test. He was surprised that no one knew what tin pest was. He even asked how to time balance a chip shooter and flexible placer, only one in twenty knew.

As Patty approached the lunch table, the ensemble held their breath.

“OK, Patty, tell us the bad news,” Phil said in a resigned tone.

“Rob wins, the average score was 58%,” Patty said getting to the point. “Here are the answers and percentages on each problem,” she went on:

1.    What is the composition of SAC305?
96.5% tin, 3.0% silver, 0.5% copper. 60% got this right.

2.     What are tin whiskers?
Tin whiskers are metal whiskers that can “grow” from tin plating on component leads. They are mitigated by 2% bismuth in the tin, a nickel overplate of the lead copper, a matte tin finish, and a few other mitigation approaches. 40%.

3.     In a stencil aperture, what is the area ratio?
The ratio of the area of the aperture opening divided by the area of the side walls. This ratio is typically used for circular and square apertures. It is equal to D/4t, where D is the diameter of square side and t is the stencil thickness. 40%

4.    What is an approximate peak temperature for a reflow oven in lead-free assembly?
Any answer 235 to 250C accepted. 90%

5.     A board is inspected after wave soldering and one lead is not soldered to the board. The board is run through the wave solder machine again and has the same defect on the same lead. What is the most likely cause of the defect?

a.       The solder temperature is too low.

b.      The pad on the board is oxidized.

c.       The preheat temperature is too high.
b 70%

6.     What are local fiducials on a PWB for?
Local fiducials are located near the pads of a component with fine lead spacings to assure accurate placement. 70%

7.     What does "thixotropic" mean in regard to solder pastes?
The viscosity decreases with increasing shear stress. Hence, during printing the viscosity drops as the paste is forced through the aperture, aiding good aperture fill. It increases as the printed deposit rests, minimizing slump. 20%

8.     A chip shooter places passives at a rate of 36,000 per hour. It is placing 300 passives on a PWB, how many seconds will the chipshooter take to place the passives on one board?
300/36000 = 1/120 hr = 30 seconds. 90%

9.     A reflow oven belt speed is 100 cm/min. The PWB is 40 cm long. What is the minimum cycle time that the oven can support?
The amount of time that the belt needs to cover 40 cm is 40/100 = 0.4 minutes = 24 seconds. This is the minimum cycle time the oven can support. 40%

10.   What is "tombstoning"?
Tombstoning is observed when a passive component's terminations experience unequal wetting forces which are strong enough to lift one end of the passive so that it looks like a tombstone. 60%

Overall average score 58%.

“Wait a minute Patty, your answers are too demanding,” Phil shouted.

“Calm down Phil, I gave full credit for anything close,” Patty responded.

In unison, almost everyone at the table sighed “Yikes.”

Patty interjected, “One person who received a 70% commented after completing problem 9, ‘I didn’t think I would need a PhD in math to do this quiz.’ “

All agreed that organizations like the SMTA and IPC were more needed than ever.

Included in the Product Data Sheet, among other things, are parameters which guide the customer in designing an SMT reflow profile. The data sheet gives general recommendations, for time above liquidus, peak temperature, and ramp rate.

The reason for addressing this subject is that, often, there has been some confusion in regard to the difference between max slope (a category reported on most profiling software) and the ramp rate listed on a data sheet.

The max slope is very often attained in the first zone as the PCB moves from ambient temperature into the oven. In most cases the oven zone setting for the first zone is 100°C or better. The change in temperature between ambient and the first zone then is a minimum of 75°C (assuming 25°C as ambient) and so it’s easy to see that the greatest change in temperature (max slope) in most cases is typically found in the first zone

The focus of max slope is more from a component view point, to avoid thermal shock, usually 3°C/s is recommended as the upper limit

The ramp rate may be better described as the rate (change in temperature over time) from ambient (room temperature) to peak. And is more practically used in a ramp-to-spike type profile

From the view point of the solder paste, a low ramp rate is desired, usually 1-2°C/s. This  gently evaporates volatiles and helps minimize solder defects such as solder balling, solder beading, and tombstoning. This rate becomes even more important as the solder paste deposit continually decreases in size - as we move to 0201’s and smaller and from 0.5mm pitch BGA’s. Due to this miniaturization, the emergence of a defect known as "graping" has also become fairly well known. The reflow process window is becoming very narrow and this attribute (ramp rate) has become as important as time above liquidus and peak temperature.

Folks,

The adventures of Patty and Rob continue.......

Rob bolted upright in bed. He had that terrible feeling that he had overslept for an important appointment. His eyes quickly found the clock and it said 10:30! 

“Wait a minute!” he thought, “It’s Sunday.”

He looked a Patty peacefully sleeping and decided to let her sleep. They had had a tough two months. Ever since they proposed increasing uptime to greater than 60% on two “experimental lines”, they were working 90 hour weeks. They just felt they needed to constantly monitor two lines, to assure that things were going smoothly. They felt satisfaction that they achieved 68.8% uptime in a two month period, compared to the company average 30.4%, which is still very good.

The local newspaper got word of this effort and did a story on Rob and Patty’s work. The article was well written and very complimentary to both he and Patty, as well as ACME. Sam Watkins, the site general manager, was very pleased with the good PR. The accompanying photos were really nice too.

The big shocker came this past Tuesday. “Sixty Minutes” called and said they wanted to do a segment on “The US Competing with the Far East in Electronics Manufacturing.” In agreeing to be interviewed, Rob and Patty insisted that members of their ACME team be included. In addition, they felt it was only fair to include the efforts of Rita from their stencil printer and reflow oven supplier and States, their colleague from the component placement company. And they couldn’t forget Eric, from ACME’s prime solder paste supplier. These three folks helped Rob and Patty and their team to develop the plan to achieve the 60+% uptime.

An even bigger shocker came when the Sixty Minutes crew told them that Andy Grove would be in the segment because of his recent article in Business Week, How America Can Create Jobs

 Grove insisted that to participate in the piece, he wanted to visit ACME to see what Rob and Patty were doing. So the Sixty Minutes crew was visiting ACME’s plant this week as were Rita, States, Eric and now “Andy.”

“Maybe we should call him Mr. Grove,” Rob thought.

Rob had suggested that he and Patty go to Berdick’s in nearby Walpole, NH for Sunday brunch and then to play golf. Rob had to chuckle, it was mid July and he and Patty had played golf 27 times (she kept a spreadsheet), he had beaten her 14 times and she was miffed. Even during their 90 hour weeks they would take a break 3 times a week to play 9 holes.

On Monday they were meeting with site GM, Sam Watkins, to discuss what they would tell Sixty Minutes.

Rob and Patty’s Sunday was delightful. The brunch was delicious and relaxing and they both played golf well, Patty’s 68 beating Rob’s 69.

It seemed like no time at all and Rob and Patty were in Sam’s office.

“Just assure me that this Sixty Minutes thing is not some expose that will embarrass ACME or put me in jail,” he teased.

Patty took the lead and explained what they had done. They trained the operators on the importance of line uptime, they worked with Rita, States, and Eric to develop a plan to assure that there would be minimum unscheduled downtime. They had to order extra spare parts and solder paste to assure no stoppages due to parts or paste shortages. One obvious thing is that they would be using two times or more the normal amount of solder paste. The two lines in the high uptime experiment had an average of one change over per day, consistent with ACME’s business.

They also increased routine maintenance on all machines. Both this maintenance and added spares was an increased cost, but these costs were second order effects compared to the dramatic profit increases due to almost 70% uptime.

Preparation for the next three jobs for each line was meticulous, so that setup time was minimized.  Feeder racks were used extensively in minimizing setup time for changeovers. In addition tape splicing was employed to minimize any assist time for component placement. States’ help was crucial in the component placement part of their efforts, Rob pointed out.

Patty went on to describe how Rita helped them in their efforts to develop minimum assist times for the stencil printing process.  The reflow oven presented the least concerns in assist or unscheduled downtime.

The solder paste they selected was robust in that it had a very good response to pause, excellent tack, and minimal slump.  The paste also had the best track record for minimizing defects like Head-in-Pillow and Graping.  Eric also participated as an enthusiastic partner in the effort.

Patty mentioned that their colleague, Phil, had agreed to monitor uptime for two standard lines during the two month trial to compare downtime metrics to the high uptime experiment. These would be experimental “controls.”

She then showed the uptime data for the two high uptime lines and Phil’s control lines. The control lines had ACME’s respectable 30% uptime, but the high uptime lines had almost 70% uptime. Rob went on to explain all of the things the team did to minimize downtime, most of it was common sense. Sam was especially interested in one downtime category.

“What is floundering time?" Sam asked.

 “That is time when the line is not operating due to some unplanned error,” Rob answered.

“Can you give an example?” asked Sam.

“Sure, you know how we have a quite organized approach to setups?” Rob responded.

“You mean our use of white boards to write down all of the things needed for the next 3 jobs on each line?” Sam came back.

“Yes, that is one of our biggest sources of floundering time,” Rob replied. He went on, “Someone will write that they have the stencil for the next job, when they just think they know where it is. When it comes time for that job the stencil cannot be found and an hour is lost.”

“Phil also noted a case where a job was finished on a line at 11:15AM, since lunch was at 12 noon, the changeover for the new job was not started until after lunch. Forty five minutes was lost, forever,” Patty added.

Sam gulped.

“So we are losing more than 25% uptime to ‘floundering?’” Sam weakly asked.

“According to the Professor, it’s endemic in the industry,” Patty interjected. “He coined the term, ‘Floundering time’,” she went on.

Sam then mentioned how the “bean counters” at ACME we really impressed with the two high uptime lines. ACME’s CEO wants a concerted effort to transition all of ACME’s assembly lines in North America  to higher uptime performance. Manufacturing in North America would also mean no 2-4 weeks of transportation time from the Far East. Patty, Rob, and their “team” were to form a new group in ACME to do this. Patty would be the Director of the group.

As the meeting was about to close, Sam asked what surprises Patty and Rob had during this experiment.

Rob then shared, “It relates to floundering time.   We found that even among the engineers, no one appreciated the value of one hour of production time. We asked a group of operators what an hour of production was worth and the figures ranged from $50 to $500 dollars. ACME runs two shifts at 30% uptime, that’s about 1500 hrs per year. Our typical line produces $30 million per year, that’s $20,000 per production hour. When we told the operators this, floundering time dropped significantly.”

Patty added, “The other thing we saw is that a “watchdog” is needed. If someone isn’t constantly watching things, floundering and assist times will go up. Since productivity is doubled with a high uptime line, the added cost of a watchdog is insignificant.”

Epilogue: The Sixty Minutes Segment was a great success. Patty was made Director of Corporate Productivity, but was also asked to manage Pete, who would take over her old group. No one seemed to worry that Patty was Rob’s boss, except maybe Rob!

Folks,

Patty and Rob return from their honeymoon.......

Patty had just finished some emails and was ready to head off to meet Rob and some of their buddies for lunch. When she and Rob returned from China a month ago, Sam, the site GM, told both of them he was giving them an extra week of vacation for their honeymoon. Their China trip had been an unqualified success in helping the China teams achieve more productivity and higher yields. Sam had received numerous positive reports from the Chinese managers involved. There were several requests to have Patty and Rob stay a year in China to help with the many process issues that the China team has. Fat chance of that happening, Sam needed Patty and Rob here! Sam also mentioned that he knew that the trip was a little stressful coming so close to their wedding, so the extra week was ACME’s gift to the young couple for their sacrifices.

The wedding went off without a hitch. Patty was touched at how choked up her dad was in “giving her away.” The weeding reminded Rob and Patty how close they were to their parents. They both agreed that the support of their parents was crucial in any success that they had in life.

For their honeymoon they decided to tour France, Italy, and Germany. Rob was really proud that he handled the languages a little better than she did. Of all the things that they saw, they were most impressed with Pompeii. Because the city was covered in hot ash in a matter of moments, it was as if Pompeii was frozen in 70AD.  Visiting Pompeii was like stepping back into the time of the Caesars.

Truth be told, Patty was happy things were back to “normal.” It was pleasant to have their working schedule and to go home to their apartment at night. A couple nights a week, and most Saturdays and Sundays, she and Rob played golf. He had improved somewhat and she was a little annoyed that so far this year he had beaten her more than half of the time….and yes, he was rubbing it in.

As Patty approached the cafeteria she heard a friendly but heated discussion.

“No way can you evaluate an assembly company with just 10 questions,” Phil Anderson stated emphatically.

“I’m really convinced we can, I’ve thought it through a lot,” responded Rob.

“What’s the spirited debate about?" asked Patty as she sat down.

“Rob thinks you can evaluate an assembly company by asking a lead process engineer only 10 questions. Phil thinks he’s nuts,” responded Patty’s best friend Jan Curtis.

“I’ve thought about this quite a bit,” said Rob. “I’ve just finished reading Malcolm Gladwell’s ‘Blink.’”  “Gladwell claims that often the best judgments can be made quickly with just a sampling of data,” Rob went on.

“Be specific,” challenged Phil.

“OK, I actually developed 10 proposed questions to evaluate a assembler, let me list them and then defend them. Maybe you guys have better ones,” said Rob. 

Patty thought, as she heard this, that it was good news that ACME was looking to buy more assembly companies to handle their ever increasing workload……not like AJAX that was laying folks off.

Rob had come prepared, he actually had some print outs. His ten questions were:

1.      What is the composition of SAC305?

2.      What are tin whiskers?

3.      In a stencil aperture, what is the area ratio?

4.      What is an approximate peak temperature for a reflow oven in lead-free assembly?

5.      A board is inspected after wave soldering and one lead is not soldered to the board. The board is run through the wave solder machine again and has the same defect on the same lead. What is the most likely cause of the defect?

a.       The solder temperature is too low.

b.      The pad on the board is oxidized.

c.       The preheat temperature is too high.

6.       What are local fiducials on a PWB for?

7.       What does thixotropic mean in regard to solder pastes?

8.       A chip shooter places passives at a rate of 36,000 per hour. It is placing 300 passives on a PWB, how many seconds will the chipshooter take to place the passives on one board?

9.       A reflow oven belt speed is 100 cm/min. The PWB is 40 cm long. What is the minimum cycle time that the oven can support?

10.   What is tombstoning?

“You have got to be kidding,” shouted Phil, “everyone will score 100% on that test.”

Jan chimed in, “I’m not so sure. We hang around people all day who study this stuff. I’m not sure the typical process ‘engineers’ have enough time to study and learn new things…..Remember the 'water in the solder' and the 'isopropyl in solder paste' incidents?”

At this comment, Phil spit up his ice tea and started choking from laughter. One of their friends, Sally Herman, had been sent to a recently acquired company to help them with assembly process issues. One of the “process engineers” introduced himself by bragging that he was saving the company money by taking used, dried solder paste and mixing it with isopropyl alcohol so that the paste could be used again. Later in the day, the same chap shared that he thought he had a solution to the poor hole fill problem in lead-free wave soldering…….the solder was too thick, if it was mixed with water it would fill the holes better he opined.

Jan added, “As a minimum these questions act as a good screening process.”

Rob interjected, “That’s my point. I’m not saying this tells us everything, but you will agree that if a lead process engineer can’t handle these questions, it is unlikely he or she would be able to solve graping, or the head-in-pillow defect, right?"

All at the table murmured agreement.

“On second thought, maybe you have something here Rob," Phil said. “What do you propose as a passing score," he went on?

“Seventy percent,” Rob answered. 

Are Rob’s questions reasonable to evaluate an electronics assembler? What are the answers? Comment with your answers. Stay tuned to find out.

Cheers,

Dr. Ron

The image above is from: http://en.wikipedia.org/wiki/File:Blinkgla.jpg

Folks,

Tin Whiskers (TW) continue to generate considerable interest. People often suggest that their risk is great and yet unknowable. RPN may help to clarify the TW risk. What is RPN? It is the risk priority number from failure mode and effect analysis.  As this link tells us:

A failure modes and effects analysis (FMEA), is a procedure in product development and operations management for analysis of potential failure modes within a system for classification by the severity and likelihood of the failures. A successful FMEA activity helps a team to identify potential failure modes based on past experience with similar products or processes, enabling the team to design those failures out of the system with the minimum of effort and resource expenditure, thereby reducing development time and costs. It is widely used in manufacturing industries in various phases of the product life cycle and is now increasingly finding use in the service industry.

RPN is an important part of FMEA. It is the product of three numbers that range from 1 to 10. The first number is the severity (S) of a possible fail. A “10” would be given if the failure injured someone, “7” would be assigned if the failure caused a high degree of customer dissatisfaction, whereas a “2” would be given if the failure has only minor negative effects.

The second number is occurrence (O) of a fail. The highest rating is a “10,” which would be a failure every day (reminds me of Windows ME!) or one fail in 3 events, whereas a “7” would be a failure every month or one in 100 events. A “2” is a six sigma fail rate.

The last number is detection (D) of a potential fail. A”10” would suggest that the detection of a potential fail is either not performed or not possible. A “7” is a manual detection approach that may not be reliable, whereas a “2” is 100% effective potential failure inspection.

So obviously a product with a RPN of 10x10x10 = 1000 is a disaster, its failure is dangerous, frequent and incapable of being detected beforehand. Industry rules of thumb suggest that and RPN of 200 needs to be addressed and an RPN of 75 is usually considered acceptable.

Let’s look at a “ball park” RPN for tin whiskers (TW). We will assume the application is a critical IC in a PC.  Let’s assume that a severity rating of “S” of 8 (failure renders the unit unfit for use) is reasonable. TW are hard to inspect for future fails, so detection, “D,” could be as high as a 10. At this point we are at 8 times 10 equals 80 for both. A bad start.

Occurrence , “O” for TW failure modes is dramatically different. When trying to assess the occurrence of TW fails, one is often directed to NASA’s web page . Many reference this web site that lists a little more than a score of TW fails. What escapes me is that people don’t seem to appreciate the rarity of less than 100 fails in decades of data collection. Surely TW fails are not common. I could find no report of a failure of a RoHS compliant product anywhere on the internet. So it would be hard to rate “O” any higher than a “2.” I suspect that the reason few TW fails have apparently occurred is due to TW mitigation techniques that are widely practiced.

I would expect that “modern” process defects like the head-in-pillow or graping defects could have a much higher RPN than TW, if assembled without proper process controls and materials. However, there is little need to worry about these defects either, if you use the right solder paste and practice some assembly process precautions.

Patty, Rob, and The Professor finished their tasks in Shenzen and were flying to Shanghai for their last set of challenges in electronics assembly.  Then they would head back to the US, Rob and Patty being only a week away from their wedding day.

As usual Rob, conked out as soon as the plane lifted off. Surprisingly, The Professor also drifted off to sleep. Patty was too excited to sleep. Rob’s mother had given her and Rob their wedding presents early … an iPad  for each. They decided to bring only one laptop and one iPad. Patty was a little nervous about using the iPad for presentations but it worked quite well. She was still surprised that the iPad did not have a USB port. The Professor also gave each of them an early wedding present, a Pickett slide rule for Rob and a K&E slide rule for her. She must be the only person in the world right now that was watching a movie on an iPad and solving a math problem with a slide rule!

True to form, The Professor was passionate about how learning to use a slide rule helped improve a person's innate math ability. He showed Patty and Rob how to use them and gave them several assignments. Rob was better with his slide rule than Patty due to the amount of “one on one” time he had with The Professor. She had to admit that using the “slip stick” gave one more of a feel for calculations and it was consistent with one of The Professor’s adages: “Always know approximately what the answer to a calculation should be…..it will help you to avoid errors."

In addition to the iPad and slide rule, Patty was excited to be going to Shanghai at the time of the World Expo 2010. Our trio had scheduled some time at the expo into their busy schedule.

Their plan was for Rob and The Professor to work on some productivity issues and for Patty to take on some of the process materials related problems. The three of them again met with the site GM for ACME’s newly acquired plant in Shanghai, a Mr. Wong. Wong was relieved to find that they all spoke Mandarin, as his English was a little rough. When The Professor addressed him in excellent Shanghainese, everyone was speechless. Patty was determined to ask him about this later. No American spoke Mandarin, Cantonese, and Shanghainese!

They again agreed to stick to Mandarin. Patty headed out to the line, accompanied by a young Chinese engineer, Zhou Chang, who seemed to be taking more interest in her than expected. She tried to make her engagement ring visible, but she wasn’t sure the he knew of the significance of it. When she got to the line that was experiencing yield problems, the Engineering Manager, Fei Ding, met her. He showed her some of the fails and she quickly identified the head-in-pillow (HIP) defect as the likely culprit. After investigating some more fails, looking at stencil printing, some of the BGA components, and component placement, she asked Zhou Chang what spec was used to thermal profile the line.

“I don’t understand what you mean,” Zhou said in Mandarin.

“How do you determine what the reflow profile should be?”  Patty responded.

With more discussion, Patty determined that they had one profile for all products! Fortunately most of the products were of similar, small thermal mass.

“What solder paste do you use for this line?", Patty asked.

The embarrassed silence suggested that Zhou did not know! They grabbed a tube and Patty was relieved to see that it was one of her favor solder pastes. Since profiling was so rarely performed, Patty and Zhou had to go to another part of the complex almost a mile away to find a reflow profiling unit. After taking the profile, the likely solution appeared. The 11 zone oven was very long and the reflow profile had a long thermal  “soak” before the temperature went above liquidus. This long soak probably exhausted the flux, so that when the PWB went above liquidus, there was little flux left, resulting in oxidation and poor reflow.

All during their time together she had mentioned that her fiancé Rob was here, with her on the trip. This information seemed to do the trick.

“Zhou, why don’t you look up the solder paste spec on the web and then set up the right type reflow profile,” Patty suggested.

It was clear that Zhou was troubled. It became obvious to Patty that Zhou did not know how to profile a reflow oven. Patty set about working with Zhou to accomplish this mission. Within an hour they had re-profiled the oven and, over the next two hours, 300 PCBs were manufactured with the yield improved to 95%.

Patty asked Fei if she could give a brief presentation on the head-in-pillow defect to his team and he cheerfully agreed. Fortunately for Patty, her friend Mario Scalzo had given her his presentation that he gave at APEX 2010 on HIP (head-in-pillow). Patty always enjoyed visiting Mario in Utica, NY, as he always knew the best restaurants in town.

Her major points were:

HIP is caused by the failure of the BGA sphere to reflow with the solder paste. There are 3 major reasons for HIP:

1.       Supplier Issues

a.       Solder BGA sphere oxidation

b.      Silver segregation to the BGA sphere surface

2.       Process Issues

a.       Stencil Printing

                                                               i.      Registration accuracy

                                                             ii.      Insufficient solder paste

b.      Component Placement

                                                               i.      Off pad

                                                             ii.      Out of plane

                                                            iii.      Non optimum pressure

c.       Reflow

                                                               i.      Inappropriate reflow profile

                                                             ii.      Flux exhaustion

                                                            iii.      PWB warpage

3.       Material Issues

a.       Poor solder paste transfer efficiency

b.      Insufficient solder flux oxidation barrier

c.      Solder paste slump

d.      PWB or BGA warpage

Patty went on to say that she had investigated all of these issues with Zhou, and that the reflow profile was not optimum as the very long soak time had exhausted the flux. The other possible issues in the list did not seem to be a concern.

At the end of the day Patty, Rob, and The Professor met at the GM’s office to leave together for dinner and the Expo. Patty had to ask, “Professor, how can you possible know Mandarin, Cantonese, and Shanghainese?”

“Actually I speak Min reasonably well too,” he replied.

“How can this be?", Rob inquired.

“Mother and father were missionaries with Wycliffe Bible Translators,” The Professor answered.

“I grew about around many languages during my youth. Mother and father speak more than I do,” he finished.

Patty went on to tell about the interest that Zhou Chang seemed to have in her, and how she had to discourage him.

“The burdens of being a beautiful young woman,” Rob teased.

Patty elbowed him, but they all left the taxi laughing as they headed for a restaurant near the Expo.

Best Wishes,

Dr. Ron 

The Shanghai, slide rule, and HIP images are from: 

http://pool14.files.wordpress.com/2008/12/shanghai_skyline_g.jpg

http://www.hpmuseum.org/powerlog.jpg

http://ppsimanufacturing.files.wordpress.com/2010/03/bga100.gif