Solder Bumping

A quick trip to discuss roadmapping with one of the world’s top processor manufacturers, and a visit to discuss Pb-free power die-attach materials, left me with a few hours to spare at LAX.

This time around I was trying to work out how much package-on-package (PoP) solder paste we would expect to see for a waferlevel CSP (WL-CSP) or a BGA dipped to half height. The need for some deep thought was driven by a customer who asked at what point a PoP dipping paste needs to go from a type 4 to type 5, 6, 7 and so on (however you define them), based on the PoP/CSP pitch or ball diameter. Good question.

To start with, in order to get consistent quantities of paste on each sphere, the PoP paste metal loading needs to be well below the point at which rheopectic behavior can expect to be seen (that is, much less than 50% by volume of solder powder metal). By doing this, you pretty much guarantee a “monolayer” of solder paste powder particles (radius r) coating the CSP or BGA sphere (radius R). Figure 1 shows the kind of result that is typical for a good paste: in this instance our halogen-free PoP paste Indium 9.88-HF.



Figure 1: 0.4mm pitch CSP with PoP paste

If the metal loading is too high, even at time zero, you will start seeing large variations in the amount of PoP solder paste adhering to the surface of each sphere (bump), even on adjacent spheres: the small amount of paste that is picked up during the dipping process adheres to the main solder sphere in uneven clumps. This is why standard type 4 printing solder pastes just don’t work in PoP applications: not only is the particle size too big – the rheology is all wrong.

If R>>r, then a reasonable first order approximation is that you can treat the sphere surface as planar and so model the number of solder particles based on a series of hexagonally close-packed particles (Figure 2 gives the definitions).
 

Figure 2: Definitions for the PoP paste dipping process

Using the same model of solder powder particle size as in the discussion on waferbumping paste, you can calculate a couple of potentially useful things:

i/ The maximum number of solder powder particles on each solder sphere (bump)

ii/ The mass of solder paste adhering to each soldersphere

The first (i/) is useful for establishing the inherent variability due to the finite size of the solder powder, and I’m going to suggest another Mackie rule of thumb of a minimum 150 solder powder particles per solder bump, based on the maximum allowed particle size (diameter). The table below gives  the result of this rather simplistic analysis:



Table: Effect of Package Bump Diameter on Solder Paste Type Needed

A 400micron bump should therefore be fine even with a type 3 dipping paste, whereas a 200micron bump will need a type 5 paste.

I look forward to someone proving this wrong. The second (ii/) is helpful, because we can easily use it to test the theoretical mass of PoP dipping paste against what we actually find. Note that this is just simple geometry: it doesn't tell us how much paste is really needed to resolve issues such as the 60 - 90micron bowing we are hearing about from our customers, even with the more rigid PoP packages currently available.

Cheers!  Andy

This week a customer in Asia asked why one of our new epoxy fluxes was not allowing the package-on-package (PoP) device to be picked up from the dipping tray. Obviously, the vacuum nozzle must have sufficient force to extract the PoP package from the PoP flux reservoir (yellow, below).



Those of you who know me also know that I am always trying to reduce things to numbers so, naturally I got thinking about how I would model this from a physical viewpoint and came up with the following:

If the downward force (weight of component plus tack force of epoxy flux) is greater than the upward force (air pressure on the bottom of the component), then the component could not be extracted from the epoxy flux. The figure shows the different variables. Expressing this mathematically, this comes out, in SI units, as:

Downward force = m.g + n.Ft.pi.(d/2)^2

where Ft is the tack force in units of mass per unit area, taken from the maximum tack force determined by the Solder Paste Tack Test from J-STD-005, ANSI/IPC TM 650:2.4.44

Upward force = 101000.A.pi.(D/2)^2

where A is the measure (fraction) of atmospheric pressure and denotes how good the vacuum is (zero vacuum is 0.0atm : hard vacuum is 1.0atm).

There are some uncertainties with this approach: How does the vacuum vary across the nozzle diameter? Does the 5mm diameter probe used in the IPC test equate to a complex CSP (chip-scale package) bottom surface, with many rounded solder bumps or solderspheres? And so on. But, at least the model puts us in the right ballpark. Just to give you a feel for how this works, the second figure shows some results. Note that scenario (iv) is the only one showing problems (negative force balance).

The data implies that you are only likely to see an issue with inability to pick up components from a dipping flux tray if either:

• Components: Heavy (thick / large)
• Vacuum Nozzle: Too small a diameter and/or the vacuum is weak/poor
• Flux: Very tacky (high tack force)

For many of the newer applications, component sphere/bump immersion to just deeper than the bump height (say 100-110%) is desirable. If the customer dips the whole bottom of the component into a standard (non-epoxy) flux, this potentially opens up a lot of issues including reliability (SIR; electrochemical migration); component displacement (skewing) during reflow; as well as difficulty in picking up the component from the tray. The solution to this series of issues, is to choose either a standard flux with a high pre-reflow SIR, such as our PoPflux 30B, or a low-volatile content epoxy flux.

I'll have more to say on epoxy fluxes in a couple of months, as we are currently nearing the end of extensive testing at several customers in Europe and Asia.

… and we’re back on the question of “how small a solder powder particle do I need, to achieve a certain bump height or bump diameter”?. There are a lot of factors that control this, but after taking the metal loading and other, second order, variables out of the picture, the two main questions to be answered are:

-          How big is the bump (width or height)?

-          What is your allowable bump height / diameter variability?

As solder bump dimensions shrink, the finite size of the particles in the solder paste used to form that bump affects the final solder bump variability. See the figure below for a visual description:

The variability therefore comes from each solder paste deposit containing a certain number of solder particles; more or less solder particles than the one next to it and so on. The question then is: how many solder particles (n), and of what diameter (d)?

Note that    n = [N(max)-N(min)] / 2

You can see the effect of this in the enclosed table:

This week's topic is both wafer bumping and substrate bumping with solder paste, and the issue of powder size. I’ve recently been dealing with some issues from customers who are concerned with the question of “how small a solder powder particle do I need, to achieve a certain bump height or bump diameter”? There are some "rules of thumb" on this in the electronics assembly industry, and I'll go into them later. In my next posting, I'll show why they may not be relevant or appropriate for the standard waferbumping process.

To begin: there are lots of ways of forming deposits of solder in a small form factor, and solder paste printing remains one of the most reliable, although yield drops dramatically at below 120microns pitch (some say 100microns).



If you are stencil printing solder paste, there are two guiding principles:

1/ Sbiroli’s Rule: The width of the stencil opening must be 7 particles or greater. By the word “particle”, we err on the side of caution and refer to the highest controlled particle diameter. For example, in the case of a type 3 paste, this will be around 45microns, although you should refer to my previous posting on the subject of powder size standardization (for types 5,6,7 and so on) and the poor state that that is in.

2/ Anglin’s Rule: You should not exceed an aperture ratio of 1.6. The aperture ratio being a measure of the aperture wall area to “open area”. As I showed in a previous post, this rule originates from boundary-layer-type considerations of release from the stencil walls by the pseudoplastic/thixotropic solder paste material. 


 

What if you are NOT stencil printing? The Flip Chip International (FCI) “drive in” process, which uses a developed photomask as a kind of “in situ” stencil for solder paste, allows for 5 or 6 print strokes using a soft squeegee to ensure that each aperture is filled. There are no problems here with stencil release, so how do we go about thinking of what particle size is required in this and similar processes? I think I have the answer: more next time.

Cheers!

Andy
 

Had some very interesting conversations at the IWLPC show last week, as always: one discussion was with my good friend Jeff Schake of Dek. He knew I had done some work a few years ago on a system for preventing solder paste drying out on the stencil by maintaining a set solvent vapor pressure, or “%RS” (the solvent equivalent of a %RH) over the paste.

Almost as a byproduct to my engineering work, I realized that I would need a tool to differentiate between solder paste that was losing solvent, and one that was simply “thickening up” due to time-dependent rheological changes (TDRC). TDRC includes phenomena such as thixotropy and rheopexy. Thixotropy, or shear-thinning, will be familiar to everyone who has had to shake a glass bottle of tomato ketchup in order to get the darned stuff to come out of the bottle: the ketchup has a weak gel-like “structure” that can be broken down to a low viscosity structure by simply shaking it. The (retardation) time it takes to break the “structure” down can be modeled by a simple exponential function based on the rheological equivalent of a half-life, as can the (relaxation) time. "Relaxation" here means the rebuilding of the gel-structure with time of the paste when it simply sits with no shearing forces, and the rate at which it rebuilds is dependent only on the diffusion kinetics -  [just in case you read the title of this blog entry and had mental images of solder paste tanning itself in the sand on Palm Beach].

The no-clean solder paste studied certainly did change in viscosity with time, but the change was reversible, fitting the rheological model rather well (data shown below) but demonstrating that irreversible drying (solvent loss) was NOT the prime cause of the stencil clogging and other problems seen.


Contrast this with the water-wash paste (data shown below), which even after a couple of hours showed signs of irreversible performance degradation that could be prevented by maintaining a controlled atmosphere as a specific %RS over the paste surface during its stencil-life.




 

Most no-clean pastes these days require little or no kneading (stirring or printing on the stencil) before they are used, but as a rule of thumb:  the more kneading a paste requires before it is useful – the less time it can be left on the stencil between prints.

Mechanistic insights like this are also helping us to develop improved wafer-bumping and flip-chip solder pastes.

Cheers! Andy

The second main ingredient in solder paste is the flux (vehicle). Flux is a very complex group of chemicals/materials that must be able to do a number of things, some of which must happen simultaneously (a partial list is below). This requires the knowledge of experienced chemists and material scientists.

1)     The flux must not react with the powdered solder while in storage (shelf life). This is aggravated by the wide variety of solder alloys available in paste form. Each alloy family typically requires it own unique flux formulation.

2)     The flux must effectively remove any surface oxides present on the solder powder itself and mating surfaces prior to and during the melting of the solder.

3)     It must effectively prevent re-oxidation of the solder powder and mating surfaces at the elevated temperatures associated with reflow soldering, especially when performed in an air environment (air is ~21% oxygen).

4)     The performance of the flux must be unaffected by a wide range of temperature and humidity conditions.

5)     If the flux is “no-clean”, the residue must be non-corrosive and non-conductive per J-STD-004.

6)     If the flux is RMA, the residue must be easily cleaned with commercially available chemicals.

7)     If the flux is water soluble/washable, the residue must clean thoroughly with heated and pressurized deionized water.

8)     In a stencil printing application the flux must adequately fill and release from the apertures of a wide variety of sizes, shapes and stencil types, not stick to the squeegee, not dry out too quickly on the stencil, retain a brick like shape both at room temperature and elevated reflow soldering temperatures (minimize slumping), provide sufficient tack to hold components in place, not spatter during soldering (boiling of flux solvents), not outgas excessively (voiding)  and provide effective wetting of the solder to a wide variety of board metallizations, component lead platings and package bumps.

9)     In dispensing applications, the paste must dispense smoothly and consistently through a variety of needles sizes either through manual application or a variety of dispensing equipment types and technologies without clogging (and do many of the things listed in item 8).

10) Provide a cosmetically appealing solder joint and flux residue (if “no-clean”).

After you've reflowed solder in contact with a flux, you're always left with a certain amount of flux residue. There are no clear industry guidelines on how you refer to the residue, and new terminology is emerging all the time. If you leave it up to me, here is what I recommend : 

1/ "No clean" flux residues:

- Standard Residue:  >40%
- Low Residue (LR): Between > 10% to 40%
- Ultralow Residue (ULR): Between >2% to 10%
- Near Zero Residue (NZR): Between 0 to 2%

Each % is given as the weight percent of flux residue after a real reflow process, and refers to the fraction of the raw flux, or flux component of a mixture (such as solder paste or metal-filled epoxy). Note that the exact amount of residue will vary with the reflow profile; the mass of flux or solder paste studied; and the rate of gas flow over the sample material, as well as secondary factors, such as the oxygen level in the reflow atmosphere.

Thermogravimetric analysis (TGA) is a pretty poor method for determining post-reflow residue levels. Results from the use of a platinum TGA sample cup with nitrogen flowing over it have been found in our testing to vary significantly with the mass of sample present, probably because the headspace in the cup acts as a "dead zone" for entrapment of vapor: TGA may therefore give artificially high % residue readings, compared to the results on a flat leadframe or other substrate.

From the viewpoint of a standard semcionductor assembl process, now consider the situation of a low-clearance direct chip attach "flip-chip" or package-on-package application, where the flux is essentially entrapped in a "cage" of I/O's, sandwiched between two flat diffusion barriers. As well as issues of flux residue, this also raises the question of how the electrical properties of the flux will be affected, if more of the solvent and other volatiles from the flux are trapped in the residue.

2/ "Water-soluble" (same principles apply for "Solvent cleanable") flux residues:

- Water-soluble: Residues can be truly dissolved in water to leave a transparent liquid: the color of the this rinse liquid is immaterial,
- Water-dispersible: Non-transparent rinse liquid with any hint of translucency or turbidity

I know that the differences here will be very dependent on rinse-water quality and temperature; chemistry of any cleaning agents; stage of bath-life and so on, but to my mind, if the rinsed liquid is not transparent, then the solids from the flux must be suspended as fine particulates. These particulates usually have refractive indices different from the bulk liquid: the result - turbidity. There may be a means of bath-life end-point determination by turbidity or dynamic light scattering (DLS) or a similar technique; possibly in combination with the standard refractive index measurement that is most commonly used.

In conclusion, note that ULR and NZR fluxes are showing increased usage in flip-chip applications, since these types of material interfere less with the curing of underfill polymers. NZR fluxes are becoming critical for copper-pillar bumping applications.

Just my thoughts - let me know what you think.

Cheers!   Andy

Dr. Andy Mackie recently put together a model to determine the probability that a component can be successfully dipped in solder paste or flux.  Here is a little more from him on this subject:

"A customer in Asia was asking why one of our no-clean package-on-package fluxes, the ultralow residue NC510, was not allowing the PoP device to be picked up from the dipping tray. It turned out that the customer was allowing the flux to coat the whole of the bottom of the component, not just the solder bumps, so the vacuum nozzle had insufficient force to extract the PoP package from the flux . I got thinking about how I would model this from a physical viewpoint.

If the downward force (weight of component plus tack of flux) is greater than the upward force (air pressure on the bottom of the component), then the component could not be extracted from the flux. The figure shows the different variables. Expressing this mathematically, this comes out, in SI units, as:

Downward force = m.g + n.Ft.pi.(d/2)^2

where Ft is the tack force in units of mass per unit area, taken from the maximum tack force determined by the Tack Test Method from J-STD-005, ANSI/IPC TM 650:2.4.44

Upward force = 101000.A.pi.(D/2)^2

where A is the measure (fraction) of atmospheric pressure and denotes how good the vacuum is (zero vacuum is 0.0 : hard vacuum is 1.0).

There are some uncertainties with this approach: How does the vacuum vary across the nozzle diameter? Does the 5mm diameter flat IPC probe equate to a much smaller sphere? and so on, but it at least puts us in the right ballpark.
Just to give you a feel for how this works, the second figure shows some data. Note that scenario iv is the only one showing problems (negative force balance).  The data implies that you are only likely to see an issue with inability to pick up PoP components from a dipping PoP flux tray if either:

- Components: Heavy and have many large PoP solder bumps
- Vacuum Nozzle: Too small and the vacuum is weak/poor
- Flux: Very tacky (high tack force)

and certainly, if the customer dips the whole bottom of the component into the flux, this opens up a lot of issues, including reliability (SIR); component displacement during reflow; as well as inability to pick up the component from the tray. This is why we always recommend a flux dipping height of 40-50% of the PoP bump height, to eliminate these issues."

I have found this model not only interesting, but useful for technicians to use when asked why components are 'only dipped 50%'.  As a technician, it is good to have a scientific reason to refer to - even though experience may have already proven the theory to us personally. 

Most of you have probably seen videos of countless Mentos/Diet Coke experiments all over the internet.  If you are one of the few who have not, this is a good site to teach you the basics: Steve Spangler Science.  Essentially what you get is an explosion of foam due to the rapid outgassing of the soda.  I am still not sure why diet soda works better than regular soda.  If you know why, please comment or email me at tjensen@indium.com.

What do Mentos and Diet Coke have to do with voiding you ask?  Truthfully, not much but it is just one example of things that shouldn't be mixed (unless you are intentionally looking for a mess).  Mixed alloys is another example.  This is particularly true when you mix Sn/Pb and Pb-free for BGA assemblies.  Today, the most common mixing is using Sn/Pb solder paste but using a Pb-Free bumped BGA.  There are concerns about overall reliability of these mixed alloys, but the most common problem people have encountered is high amounts of voiding.  This comes as a direct result of people trying to improve the reliability by raising the Sn/Pb reflow profile to around 225-230 C and allowing complete mixing of the two alloys.  This definitely gives a more homogeneous microstructure, but most Sn/Pb pastes weren't designed for that high of a reflow temperature.  High peak temperatures result in more flux outgassing and, therefore, more voiding.

To avoid the excessive outgassing, you could eliminate mixed alloys.  Everyone would like to do this, but it is often not possible.  Therefore, you best option is to select a solder paste that is more thermally stable and has a high oxidation barrier.  This will reduce the outgassing at the elevated peak temperatures and allow you to focus on diet coke outgassing rather than that of the solder paste.

(Follows this post)

Microsphere quality is especially important for bumping wafers.  The dimensional tolerance of microspheres impacts the bump co-planarity across a wafer surface.  In short, more precise spheres directly influence the quality of bumps on the die.  This will of course increase process yield since the spheres will all be closer to the pads they are being soldered to.

90um flux deposits on silicon

(Follows this post)

In most cases, all that is needed is about a 25um layer of flux on the bonding surfaces and solder – usually 2-4% mass of the solder.  Flux should almost never be of equal volume as your solder (except for some solder pastes).  The perfect amount of flux will be enough to form a good solder joint, but will clean well (for water or solvent soluble fluxes) or appear clearer with less residue (no-clean fluxes).  In extreme cases, lowering flux volume can improve reflow cycle time, because complete activation can occur sooner – and thermal inertia is decreased.  More volume is also more expensive.  Keep this in mind and dial in your process.

Photo courtesy Optocap

Au stud bumped flip chip attachment?  Low temperature assembly requirements? Indium is your answer…

Indium can be used in many ingenious ways to attach flip chips.  It can be used for solder interconnections, cold-weld attachments, and even low temperature solid-state diffusion bonding.  The pliable nature of indium allows it to perform well during reliability testing - such as temperature cycling.

Have you ever had a hard time getting help with something?  For the last year I’ve been searching for a new vehicle, which can be a long journey for a technically oriented car guy.  The problem has been that the local dealerships in my region are unwilling to take their customers seriously.  The exact car that I was interested in sits only 13 miles from where I live, in a showroom.  The salesman who asked me if I needed anything (notice I didn’t say “helped me”) admitted that he didn’t know anything about the car, and that he didn’t want to – since it was to be shipped to somewhere where it would sell.  He then mentioned that my Jeep Wrangler couldn’t be traded in because it was a gas hog and there isn’t a market for those in central NY.  I left disappointed, did I mention I was asked not to sit in the car or open the hood?

The next stop was a dealership 60 miles away.  This dealership would not allow anyone to test drive the Lancer Evolution X.  This time I was allowed to at least sit in the car, check out the engine, trunk, and other components.  Still, no test drive = no sale.

I was done wasting time with salesmen that had no interest selling their performance car.  These guys just wanted to sell economy cars all day.  Easy, but what fun is that?  A dealership 100 miles away told me over the phone to stop by and try out the car.  A test drive is all I needed, and I left the dealership with a new car that day.

Why does this relate to us?  I don’t expect you to make big decisions about ball attach fluxes, flip chip fluxes, package-on-package pastes, or bumping materials without feeling confident you are getting the right product for your application.  Sure, a car isn’t a consumable item like flux or solder – but I understand that you need to spec in the materials that you use and it can be a pain to change.  Let’s get it right the first time!

~Jim  

For a change of pace, again, I have asked another Technical Support Engineer, Chris Nash, to comment about powder sizes.  Chris is the Regional Technical Support Engineer for the Midwest region, and works from Indium Corporation HQ in Clinton, NY.

 

• Are you looking for information on semiconductor packaging materials?  Send your request to jhisert@indium.com.  It’s all fair game – released, experimental, or competitor materials.  Flux characteristics, paste properties, application methods…

   

  Inquire about any of the following topics:

  • Pin transfer
  • Package-on-Package (PoP)
  • Solder spheres
  • Glass transition temperatures (Tg)
  • Flip chip assembly
  • BGA rework
  • Cross-sectioning electronic components
  • Paste for component dipping
  • Solder alloys
  • Liquid fluxes
  • Wafer bumping
  • Low alpha solder
  • Spin coating
  • Redistribution layers (rdl)
  • Halogen-free
  • Flux viscosity
  • Solder paste viscosity
  • Whatever else you are interested in

After discussing flux removal (which is usually a precursor to underfilling) it is only natural to discuss capillary underfilling.  Low bump standoffs cause problems with water soluble cleaning, and similarly make capillary underfills difficult to use under standard conditions.  Some capillary underfill manufacturers may have alternative materials for the tightest applications, so double-check that you are using the best possible material.  Even though it may be tempting to crank up the underside or nozzle heat, stick to the underfills specified ranges.  You can check the flow characteristics of an underfilled flip chip by CSAM or dye-n-pry methods.  Poor underfill flow will result in air pockets around the solder bumps after cure.

Image: periodictable.com

In recent days, one of my fellow applications engineers, Jim Hisert posted a blog on his semiconductor website about indium bonding and indium cold welding.  This is a topic that comes up often both in the semiconductor world as well as the thermal interface material world. 

In semiconductors, I believe the most common application for the indium bonding process is cold welding low temperature indium flip chip bumps  to an indium substrate.  In the thermal interface material world I commonly discuss this topic with engineers who want to use it to achieve a void-free, high reliable thermal interface material and solder TIMs are out of the question because these require the use of a flux.

For more information on the topic of indium bonding and indium cold welding, read through Jim's blog. 

Lets talk about some issues…