Semiconductor / Power Semiconductor Assembly

My friend and colleague, Eric Bastow, got back last month from an IPC standards meeting with some interesting news for those of us who supply and use solder paste. Here I’m talking about everything from standard SMT printing and Power Semiconductor die-attach solder paste (type 3 and 4) down to PoP and waferbumping solder pastes (type 5, 6, 7 etc). I had heard that there were some changes in the way the powder types are categorized and wanted to learn more. Here is what we discussed:

[Andy Mackie] What is the current status of solder powder “type” designations from the new IPC J-STD-006B (Oct 2009)?

[Eric Bastow] In the original J-STD-006B (Oct 2008) and its two amendments, a solder particle size distribution (PSD) table, Table 3-1, was included as part of the standard to define the different powder “types”: 3, 4, 5 and so on. However, this table has been removed from the version published exactly 1 year later (October 2009) and also, somewhat confusingly, called J-STD-006B. This latter standard refers the reader to the old J-STD-005 (Solder Paste) for powder type determination by PSD, tables 2A and 2B.

[Andy Mackie] So how are solder powder types currently (May 2010) defined by the IPC? 

[Eric Bastow] The responsibility for defining the powder size distribution for the respective types now goes by default to IPC Task Group 5-24b, which maintains the J-STD-005 and its amendments and associated documents. This standard and its amendment were created in the early 90’s, and then published in January 1995, when even type 4 paste was uncommon at best, so its relevance now in the second decade of the third millennium is rather questionable, particularly given the enormous changes in solder powder manufacturing methodology and analytical characterization that have occurred in that timeframe.

[Andy Mackie] I understand that there are even some concerns about the test methods used to define the PSD.

[Eric Bastow] Yes, very much so. It is interesting to note that the original J-STD-006B Table 3-1 recognized that “Types 5, 6 and 7 are shown as general industry accepted size ranges for development purposes. Current listed methods for measuring these particle sizes may not be accurate enough for exact size and range distribution”. That initial sentence is very revealing about the tentative nature of these “type” definitions. These same concerns were raised at the J-STD-005 meeting at APEX in April 2010, and I also raised issues about the relevance of the test methods (see below) that were in use.

Note that none of these addresses the possibility of pure solder powder being the sample.

[Andy Mackie] How did you and Indium Corporation drive the Solder Paste Task Group (5-24b) into the next phase?

[Eric Bastow] We realized that using 15year old test methods and standards for solder powder based exclusively on extraction from solder paste would raise serious concerns with our customers. As a start, Indium Corporation suggested round-robin testing amongst the various solder powder suppliers. The testing will involve the use of the in-house measurement techniques of those suppliers on representative powder samples from each of those suppliers, to see what sort of data scatter is observed. We helped the task group to recognize that defining the particle size distribution of the various types, especially the finer types, does not make much sense without first determining a reliable and repeatable method of measuring the particle size.

Once that is complete, we can begin to define what we mean by each powder type, and also if there is a need for such “hybrid” categorizations as type 4.5.

[Andy Mackie] Eric: thank you, and please keep up the good work.

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The interesting thing is that it will not affect the way Indium Corporation supplies or manufactures solder powder and paste materials according to our customers’ needs: just how we define them.

Cheers!   Andy

Andy's 10 Rules for Presentations

I spent this morning discussing presentations with a younger colleague, and realized that I may have some pointers to give the rest of you. This time I managed to think of 10. There are some obvious things, and some things that I have learned over the years of presenting information to audiences. I'm talking here about situations where you are presenting to a meeting of native English speakers (Americans, Australians, Brits, many Canadians etc), but some of the principles will apply anywhere.

1/ If something stands out: talk about it (even joke about it). Then get on with the main item: your presentation

Maybe you forgot a necktie... or you have a sore throat... or you have a foreign accent... or you are disabled in a visible way. Explain it then move on. Don't mention it again. Anything unusual and unexplained means that your audience will be spending time wondering what happened rather than listening to you. Also, if something odd happens during the presentation - again - talk about it for a second ("Ok: we all heard a loud bang - I don't think it's anything to worry about."), then get on with your job of explaining your information.

2/ Talk so someone at the back of the room can hear you

I'll talk about microphones in a minute, but talking audibly doesn't mean shouting: just talk a little louder than normal conversational volume, and, hey, ASK a person at the back of the room with a smile: "Can you hear me OK?". Your audience is your customer for the information you are providing: they chose to come and listen, and the reality is that they mostly do not care about you - just the facts you are presenting. Microphones can complicate matters rather than help, in many instances: for example, turning your head "out of the zone" may make you inaudible. At the iMAPS Arizona show a couple of months back, one presenter forgot this, so all we heard was "On the next slide you will see that..." then he turned his head to the projection screen, and we completely missed the next part. Lapel mikes are suppoed to be worn on the lapel, hence the name. Don't do as I did one time and use it like a hand-microphone - the audience will be deafened and hear every intake of breath and smack of the lips. You can not hear yourself as your audience does, and take note if people seem to be having trouble hearing - their body language will give you the cue.

3/ Do... not... read... off... the... slide

It's been said before, but bears repeating: the presentation is there to provide just enough data and memory-jogging (for you) to make your discussion credible, not to substitute for your verbal exposition. This is the classic, but understandable, mistake made by presenters in their non-native language, and man, is it a great way of turning a dynamic talk into a speak-n-spell session. If anyone at a conference just reads the first two slides, you will notice me pulling out my Blackberry and getting on with something that can not be put off to another time (i.e. just reading the presentation). And done faster, to boot.

4/ Presenting to 10,000 people is the same as presenting to 10 people

OK: I'm lying. It isn't the same - we both know that you'll get more nervous, but the basic principle is that you are presenting to some PEOPLE, not giraffes or pencil erasers. Just MORE people, that's all. My first swimming teacher said, "If you can swim in 7 feet of water, you can swim in 1,000 feet of water". The opposite principle is the same: if you have a problem keeping your head above water in front of 5 people, you will not do any better at Madison Square Garden.

5/ Slow down

Not to a crawl, but don't be afraid to take a breath and pause for a second. Aim to talk about 10% slower than normal, and if you can avoid slang expressions in front of a multicultural audience, you'll be a lot better off.

6/ Water

Always have some available during your presentation to sip occasionally. The best comedians know that the audience will forgive a momentary pause, and it also reminds your audience that they are listening to a human being.

7/ Practise

Practise makes very good. Too much practise makes slick and dull and uninteresting to the presenter and the audience. However, slick and dull is better than....

8/ Umm err you know, like, stuff you umm. Yeah. Err... Don't!

There is a great line from the old BBC show "Dad's Army" when one of the soldiers hesitates while talking and starts saying, "Errr...". Private Godfrey pipes up with "To err is human." Great line! Your audience will forgive the odd little hiccup like this, but umm if you err like umm.... then no-one will want to listen. Also, please don't "you know" all the time. We know. We really DO know. We know you sound like an idiot.

9/ File Format

Everyone knows that technology has speeded up our lives and lightened our workload to the point where giving presentations is easy and painless.... I'm sorry: I can't keep a straight face typing this - we know that, with different operating systems and computer anti-virus software and so on, even the best presentation can be laid low. I did a presentation 11 years ago, where the greek letter "delta" in the presentation was substituted by something that didn't even look like an alphabet character. Quick! Think!!! "This thing here that looks like R2D2 got caught in a car crusher is supposed to be a 'delta'". Audience laughs: point made: everyone substitutes "delta" for R2D2 and the presentation goes on. If I'm presenting, I usually bring my own laptop and a copy of the presentation in PowerPoint and PDF format on both a CD-ROM AND a memory stick. Seems to have worked so far!

10/ Continuing Distractions

At a meeting a couple of years back, a speaker was interrupted by loud music coming from a back room. Not something that could be ignored or joked about (see 1/). In this situation, you need to make sure whoever is chairing the session has noticed that there IS a problem. Some session-chairs are remarkably oblivious to problems, and they are also responsible for the comfort of the speakers during the session. In this instance, the chair dispatched one of the organizing committee to get the music turned down: it was: presenter made a joke about being a party pooper and he got on with the presentation.

Cheers! Andy

Solderspheres or solder spheres, or even solder balls: whatever you call them, Indium Corporation has been making them for years and has rightly acquired the reputation for doing whatever it takes to meet our customers' unique needs.

Unique Alloys:

Hard to find alloys (like multipart alloys; low-melting alloys and even gold/tin (80Au/20Sn)) are our bread and butter. As "Indium Corporation" it should be no surprise that we lead the world in our ability to supply low-melting indium-alloy solder spheres, as well as other forms of these alloys, such as engineered solders or solder pastes.

Unique Quantities:

We don't want you to buy more than you absolutely need. If you just want 100 spheres, we can easily do that: if you want more - we can do that, too. But remember that, because each customer's need is unique, our prices may be higher than our competitors, especially for more standard alloys. Some customers also have unique inventory-control needs, so we work with many customers to ship on-demand by retaining a buffer stock of spheres here at Indium.

Unique Sizes:

Our current dimensional capabilities as of this writing are from 80microns to 0.062inches, or even bigger. Generally, the bigger the sphere - the less spherical it is (within the limits of surface tension and viscosity), and we can't control the laws of physics, so instances where a very large amount of solder is needed, a preform may have better dimensional control. Also, notice that we won't ask that you order in a specific unit of diameter measurement, like the mil or the micron or the millimeter: we're a global company - just tell us what you need.

Unique Packaging:

Often needed for more delicate alloy spheres, we can offer specialty overpacking that eliminates oxides from the atmosphere around the solder spheres, essentially stopping oxidation in its tracks. It's the same technique we use to package our soft solder die-attach (SSDA) wire: a technique that showed that the very reactive wire was still "as new" 3 years later. We also offer spheres in tape & reel packaging (see image) for 24mil, 35mil and 62mil diameter spheres.

Unique Tolerances:

Just as a case in point, a MEMS customer of ours had a need for a low-melting indium-alloy solder sphere with a tolerance of +/-5microns (+/-0.005mm) for a sphere with a 350micron diameter. That demands a tolerance of just over 1% - pretty demanding, but we did it.

Our standard tolerance is +/-1mil (1 thousandth of an inch, or 25.4microns), but as you can see, we have the capability to go to much tighter tolerances using three proprietary manufacturing techniques.

Other Needs:

We are also seeing people asking for doped-alloy spheres; low-alpha emission solder spheres and other things that we could never have dreamed of...

So please just let us know what you need. We'd be happy to help out, and if we can not do what you ask - we'll let you know why.

Cheers!  Andy

I mentioned in a previous a blog posting that the primary driver for halogen-free electronics is ostensibly environmental, but that the confusion about “which halogens and which molecules and what level?” has seemingly decoupled the laudable desire for an improved environment from the reality and made it more of a marketing tool. All this notwithstanding, there remain some instances where the performance of the final product itself can be directly impacted by the presence of halogens, usually as ionic halides. This is the reason why Indium Corporation recently developed what appears, at first glance, to be an odd combination: a high-Pb (high-lead) alloy halogen-free die-attach solder paste, Indium9.72-HF.

The halogen-related failure mode for die-attach solder pastes is the corrosion of wirebond pads on the topside of Power Semiconductor die which are soldered to the leadframe with halogen-containing solder paste. Many manufacturers producing high volumes of identical power devices may also use die-attach (sometimes called “soft solder die attach”, SSDA) wire to attach the die to the leadframes in a fluxless process, but many manufacturers prefer the inherent flexibility of a solder paste-based process for medium mix / medium volume applications.

Long term blog readers will recall that I did a posting on solderspatter (a.k.a. soldersplatter or soldersplash), and that it can be caused by bubbles of solvent vapor or moisture outgassing from solder paste deposits during reflow. In bursting, the tiny flux droplets or solder particles from the surface of the bubble can be propelled quite a distance (several feet). While solder on wirebond pads is clearly a failure from a reliability viewpoint, certain wirebond pad metallizations may also be subject to corrosion from flux. A poorly maintained reflow oven may also drip flux condensate (usually in the exit – cooling – zone), and this too can be a cause of organic materials on wirebond pads.

As long as the bondwire is gold, and wirebond pads are covered in a uniform layer of gold, there is no problem (as long as the flux residue is washed off) since gold is unreactive, even in corrosive environments. Aluminum (Al) or aluminum/silicon (Al/Si) bondpads, however, are potentially reactive. Halogenated materials, such as fluxes and overmolding compounds may react with them to either reduce the wirebond pull strength and/or increase the wirebond junction resistance, leading to localized heating and subsequent thermal-related joint failure. Even covalently-bonded (C-X, where X is a halogen) materials may dissociate at high temperatures: which is how the banned brominated flame retardants work, of course.

The biggest danger of halogenated flux corroding wirebond pads is when:

1/ Completed assemblies (between the reflow process and the cleaning process) are left for a long time before cleaning; particularly if they are exposed to high humidity (high %RH) before cleaning.

2/ The cleaning process is inadequate: either due to poor selection of the cleaning solution, or poor bath maintenance, or inadequate “scrubbing” energy being imparted to the surface to be cleaned, or simply if inadequate time is allowed for cleaning.

Note that even optimizing 1/ and 2/ may still lead to bondpad corrosion.

The Indium9.72-HF paste is available in both type 3 and 4 powder, in the standard high-Pb alloys, Indalloy 151 (92.5Pb/5Sn/2.5Ag) and Indalloy 163 (95.5/2Sn/2.5Ag), and for larger die that need a higher reliability joint, we also offer the Indalloy 164 (92.5Pb/5In/2.5Ag). A Product Datasheet is available for download, of course.

Cheers! Andy

Those of you have been watching this blog for a while will know that I’ve been keeping tabs on the status of the European ELV (End-of-life vehicle) legislation on lead (Pb), mercury (Hg), cadmium (Cd) and hexavalent chromium (Cr^VI). It’s been both galling and heartening at the same time, to find that when I Google “elv legislation”, this (my) blog keeps coming up as one of the top 10 sources on the subject. OK: enough of the bloggy, solipsistic prevarication...

My friend, Geert Willems of IMEC late last week let me know that the EC (European Commission) had given its final decisions on Annex II ("the exceptions"), and pretty much adopted the recommendations of the Öko Institute from their 127 page report of September last year (2009). I have to say my hat is off to Dr. Otmar Deubzer of IZM and Stéphanie Zangl of Öko for the very thorough and logical background to this legislation.

The decisions that affect those of us in the semiconductor (flip-chip) and power semiconductor arena are primarily the ones on lead (Pb) in solders, that were formerly covered by section 8.a/ and 8.b/ of the old, outdated Annex II to Directive 2000/53/EC, and are now covered by this new legislation.

A quick visual summary of the legislation relevant to lead (Pb) in electrical interconnects is given below, and please consult the original document for confirmation, as I may have missed some subtlety of the legalese in my quest for brevity. Also, frankly, subsection 8 (b) led to some Transatlantic confusion over whether finishes on pin connectors and PWB's were covered(?), but I think the below is correct:




Refer to the table below for the timeline for of each subsection/exception:



Note that the last review of exemptions was carried out in 2009, with potential effect by 1/1/2011. This implies that the legislative hammer will potentially fall on each of those usages slated for future review on January 1st two years after the review year. Lead (Pb) for most electronics attach usages of interest to those of us in semiconductor and power semiconductor packaging may therefore be "legislated out" by 1/1/2016.

Basically, the use of Pb-containing solders in solder paste, die-attach paste, die-attach wire, solder preforms, and thermal interface materials (TIMs) in automotive electronics assembly is safe for now, and changes will not be forced on the automotive electronics assembly industry at a time when even current manufacturing practises may be leading to still-unresolved safety incidents.

Cheers!  Andy

I caught up with Alan Rae after a recent IWLPC committee meeting, where he jokingly asked me to, “Stop asking important questions” - LOL! He was kind enough to give me a few moments of his time to share his wit and wisdom, and answer some technology questions that, yes, I thought were kind of important…

[Andy Mackie] You’re increasingly being seen as “Dr Nano” by the electronics industry – how did you arrive as the focus of so much of this technology?

[Alan Rae] At the start of my career I was in the structural ceramics business. In the days of “ceramic fever” in the 1980’s the mantra was sub-micron and monosize (monodisperse) for lower temperature processing and better properties. It worked. Then at TAM Ceramics we made “sub-micron” barium titanate and other ceramic materials but we didn’t call it nano then. When I was at Cookson Electronics in the early 2000’s we started to see nanotechnology emerging from the woodwork with people saying the same about nanomaterials for the electronics industry. Then I joined NanoDynamics in 2004 and realized the scope and potential, ranging from semiconductors to touch screens to printable electronics, to LED lighting, to solar power, to materials such as nano solders, dielectrics, conductors…the list is growing but the leitmotiv is the same – small, monosize, tightly-controlled. 

[Andy Mackie] OK, so Nanotechnology has been a buzzword for quite a while – is there a clear definition yet, and what current uses are there for nanotechnologies that may not be immediately obvious?

[Alan Rae] Well, the definition has been really tough to derive – ISO TC 229 “Nanotechnologies” came up with a definition that one dimension of a particle, needle or plate should be less than 100nm but it’s really tough to define…should all particles be less than 100 nm? 50%? Any? And should it be exactly 100nm? There are a lot of opinions. The Woodrow Wilson Institute lists over 800 consumer products containing nanomaterials on the market now – industrially the products range from semiconductors, to fillers in packaging materials and underfills, to antimicrobial and self-cleaning coatings for phones. Solar panels, especially thin film ones, depend on nanomaterials in their manufacture.

[Andy Mackie] What is in the pipeline for nanotech electronics and semiconductor interconnect materials? I know that nanosolders are starting to gain ground in some areas – what else is upcoming?

[Alan Rae] Much of the work in nano metals is being done by universities and small companies – for example my small company is working with Purdue and the Air Force to develop a novel solder technology – but commercialization will come by partnering with established companies like Indium Corporation, who have the distribution and technical support so that customers will be comfortable with a new material. Cost and reliability are king. Indium is already in the reactive nano foil business; there are existing and near-term applications for silver, silver-coated copper, alumina coated boron nitride and their combinations in adhesives, shielding materials and thermal interface materials.

[Andy Mackie] Several years ago, quantum dots were being promulgated for tunable band-gap detectors and quantum computers. How close are quantum dots to seeing real uses, and what else is on the horizon?

[Alan Rae] Quantum dots are unique and have great potential in medical imaging and as frequency shifters for LEDs. The markets haven’t developed yet because of the cost and because some of the best dots are cadmium (toxic metal) based. I’m working with a group at University of Buffalo which has a silicon quantum dot process that looks like a promising alternative. Quantum dots will have their time…but not just yet. In terms of new developments – they range from core shell and modulated structures for thermoelectric to replacing indium tin oxide with carbon nanotubes or graphene. The US National Nanotechnology Initiative tracked $1.6 billion in Government spending (check out www.nano.gov) in the last year at Universities and small businesses and NSF has set up centers of excellence at Cornell and other great universities that are really working hard to translate science into technology so we can make practical products.

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Alan, many thanks for your time, and for sharing your insights with us.

Cheers!  Andy

Just before the New Year, I had the opportunity to sit down with my old friend and colleague Dr Conrad Sorenson. Conrad is an expert in the fusion of electronics technology, marketing, and results-oriented business strategy – a discipline he refers to as Technical Scouting, and he specializes in sorting out and quantifying trends in electronic materials.

[Andy Mackie] The USPTO already has a search engine on its site – why is it sometimes ineffective at helping me find the patents I need?

[Conrad Sorenson] The USPTO system is a giant Oracle database.  We interact with the database by matching keywords against its contents. Unfortunately, because there can a thousand ways to describe an innovation, using the English language to retrieve them can be quite difficult. Ambiguous results can be improved by cross-filtering using CCL codes and sub-codes (aka the US Patent Classification System, a rather old-fashioned listing of technologies which can be used to limit results to specific fields of use) or restricting inquiries to specific fields such as abstracts, inventors, assignees, etc. Unfortunately, because the database must serve the public, the USPTO limits the length of queries to the patent database, which impedes our ability to extract relevant information.

[Andy Mackie] How does your patent search technology work?

[Conrad Sorenson] I have automated both the initial basic search criteria and the process of downloading the results to a local database. Because filtering is done offline, my strategy has evolved to use the USPTO selection criteria broadly, to minimize the amount of pertinent intellectual property overlooked by the initial filtering process. After pertinent patent data is downloaded locally, my patent scanner confers with proprietary databases to automatically segment results into markets, technologies, and supply chains. 

 Another important feature of the scanner is that it not only looks into the databases of granted patents but it also simultaneously explores published documents in the patent application database. Patent applications are fascinating. They can reveal knowledge about the internal development investments which could only otherwise be gained under non-disclosure. According to research I performed a few years ago on Atomic Layer Deposition, patents are published within about 9 months ± 6 months from the filing date. By analyzing changes in the number of patent filings in over time, you can learn whether a technology approach is being emphasized, how it ranks with other technology development efforts, and by closely examining CCL codes, learn if the technology has shifted directions – for example from ALD process for depositing high dielectric constant materials toward diffusion barrier coatings. The downside to including patent application data is that results can often be obscured – only market share leaders clearly identify themselves as the assignee in patent applications. My scanner sniffs this information out by examining each inventor’s recent assignment information, double-checking to ensure if they are in the same general geographical location, and then determines a likely patent assignee.

      As you can tell from the above description, my development efforts continue to be around the management of an abundance of data, to winnow it to the knowledge we seek. When restrictive filters are removed in the search for patents, we have to develop new skills for managing this abundance of data. Because such techniques can yield thousands of results, even after market, technology, and supply chain segmentation, I am applying artificial intelligence concepts to the search for knowledge. I am having excellent success using a neural network to patent search results to distil highly relevant patents from a pool of mixed relevance and non-relevant IP.

[Andy Mackie] Can you explain “neural networks” in simple terms?

[Conrad Sorenson] Neural networks are method of teaching a computer to “think” much like a human. They emulate the functioning of the brain through the use of weighted linkages between synapses or “nodes” (see figure). 


The style of network I am using (a back-propagation neural network) actually learns a task by comparing results against a training set, then adjusting weighted linkages between synapses until error rates drop below a threshold. I “train” the network by providing it with an exemplary set of patents classified by relevance (High, Medium, Low, and Not Relevant). The patent scanner manipulates node weights until it is able to reproduce my exemplary results, then applies this to un-reviewed patents. It automatically sorts through an almost unlimited number of patents (more than one per second) and comes up with results that are very interesting! In this manner, I am able to break through the limitations imposed by a keyword searching methodology, by duplicating and applying my judgment of patent relevance to the process. 

[Andy Mackie] How do you find the “key phrase” that differentiates the patents I am truly looking for, from the “chaff”?

[Conrad Sorenson] That’s my secret: I don’t! I unfetter the USPTO keyword search process, and then apply the techniques outlined above to the results. For example, I recently did a search of patents for “semiconductor vacuum chamber seasoning” for a client. It turns out that restricting the USPTO search to only semiconductor applications culled out some very useful data. I got the best results using the keyword search terms ‘“chamber” AND “seasoning”’. As expected, the results included more references to Kentucky Fried Chicken than IBM! By segmenting results to electronics markets, I quickly achieved the results which were useful for my client.

[Andy Mackie] As a technology marketing guy, you look at patents in a different way than intellectual property specialists or R&D professionals. Can you give us some insights from your experiences?

[Conrad Sorenson] I do not look at patents from a traditional standpoint of intellectual property. I consider the USPTO to be a rich source of competitive intelligence. This is analogous to the use of signals intelligence to obtain important information. In World War II, after a change in codes, Allied code breakers would go for long stretches of time without being able to read our adversary’s coded messages. During these dry spells, they could still obtain highly-valuable information by determining where messages were transmitted, when they were sent, and who responded to them. Similarly, what companies are doing – or not doing – and how much they are spending to do so can be determined by information published in the USPTO database.

Combined with more than a decade of experience looking at online patent information; I can also infer technology maturity from supply chain segmentation. Because a technology progresses in a predictable way, early IP has a supply chain which emphasizes Universities, National Laboratories, transitioning to large industrial laboratories. Materials companies then emerge, followed by OEMs and End Users. In a well-developed market such as semiconductor manufacturing, there is a ratio of 1:10:100 between materials suppliers, OEMs, and End Users. If this ratio is skewed, it indicates that there is a competitive challenge in the outlier.

[Andy Mackie] I really appreciate your sharing this with me and our Blog readers. If you’d like to learn more, Conrad can be reached through his website , phone +1(716) 639-0721, or email him at Conrad.Sorenson@EnablingMaterials.com

Cheers! Andy

Forming gas is a complicated topic, so I will provide some preliminary background in this section, then get into the soldering part next time.

Don't you mean "formic"?
 

Forming gas is a mixture of hydrogen (H2) and an inert gas (usually nitrogen, N2) that is used to reduce oxides on metal surfaces to water. Please don’t confuse this with formic acid (HCO2H), which I hope to touch on in another posting later this year.

Safety

The reason for the dilution of hydrogen by the inert gas is to keep the hydrogen below 5.7% (by volume), as this is the point above which the hydrogen can spontaneously combust. Gas companies such as Linde and Air Products consider forming gas at less than this level to be an inert mixture, so the fittings used for gas cylinder attach are the standard CGA580 type used for nitrogen, argon, helium and so on. Depending on the gas supplier, they may allow a maximum of either 5.0% or 4.0% hydrogen, to ensure they are within safety margins.

All this notwithstanding, 100% hydrogen furnaces are used around the world in a variety of different processes, and I have also seen soldering processes around the world where 10% and even 20% hydrogen/nitrogen forming gas is in use. I am not saying that >5% H2/N2 can not be safely used, but you have to be careful when using it.

 
Gas Supply

There are three ways of supplying gas for forming gas-based soldering processes:

1/ Mixing hydrogen and nitrogen in a special panel. Sometimes this may also incorporate a catalytic reactor that reacts ppm traces of oxygen, with hydrogen to form water: the water  is then removed by adsorption. This process makes a very "clean" forming gas that will have optimal reducing properties. Usually, the nitrogen source is from vaporised cryogenic N2, and the hydrogen is from a cylinder or "tube"-based sources.

2/ Cylinder supply. A single cylinder, or a manifolded bank of cylinders may be used to provide the gas as a mixture. Usually, this is used as-received without being cleaned up.

3/ Ammonia cracking. Basically, NH3 -> 3N2 + H2. This is feasible, but results in a fixed 3:1 ratio of N2 to H2, and is never used (to my knowledge) in soldering. It is also massively inefficient in terms of costs and power usage to make the ammonia, plus the ammonia usually has a much higher moisture content than a nitrogen plus hydrogen gas mixture.

What does it do in soldering? I’ll get into that next time: I'll be talking thermodynamics and kinetics, and there WILL be a test.

Cheers! Andy

Andy Mackie: What role does gold play in protecting surfaces in SMT and semiconductor assembly processes?

Lenora Toscano: Gold does not form an oxide; it protects the nickel from oxidation or passivation. A clean nickel surface has very high solderability for most solder types, but its oxide is very difficult to remove with standard flux types. Also, gold dissolves almost instantaneously into most solders during assembly, thus promoting superior wettability.

Andy Mackie: What standards exist on the thickness of gold for different electronics and semiconductor assembly applications?

Lenora Toscano: The main application of ENIG (electroless nickel/immersion gold) coating is in chip-on-board (COB) technology, the typical thickness of the immersion gold layer on the HDI substrate being 3-5 micro-inches.

Edge connectors typically require the use of hard gold. Acid gold deposits are used for compliance with MIL-STD-275, which states that gold shall be in accordance with MIL-G-45204, Type II, Class 1. The thickness shall be 50-100 micro-inches, typical thickness is 30-50 micro-inches on 150micro-inches nickel.

On the other hand, for solderable surfaces, typical thickness is 5-15 micro-inches on 150micro-inches nickel.

For wire bonding, in general, gold plating of a minimum of 30 micro-inches on 200 micro-inches nickel works well. Soft gold is generally preferred. Soft gold processes are also used for boards designed for semiconductor chip (die) attachment. These qualities comply with Type I and III of MIL-G-45204.

Andy Mackie:  What are the differences between gold layers deposited by immersion gold and electroplated gold processes?

Lenora Toscano: There are five main differences:

1. The coating thickness is different. Immersion gold is a displacement reaction, gold displaces the nickel on the surface, and is self-limiting as the nickel surface is coated with the immersion gold. Common baths cannot produce thicknesses of much more than 10 micro-inches, while with electroplated gold the thickness depends on current and time. The higher current or longer the plating time the thicker the gold coating.
2. The structure of the gold deposit layers is different. Electroplated gold is denser that the naturally porous immersion deposit.
3. The hardness is usually different. Electroplated gold often has other metals introduced into the plating that make the deposit harder.
4. Porosity is different. Immersion deposits have more porosity that electroplated deposits; it is the nature of the plating system.
5. Deposition composition (purity) varies with additives in the bath. Immersion gold baths contain gold as the only plated metal, while electroplating systems may introduce small amounts of other metals.

Andy Mackie: How thick does gold have to be to fully protect the underlying surface, and what are the trade-offs as customers attempt to reduce their gold costs?

Lenora Toscano: Per IPC-4552 ENIG specification, 1.97 micro-inches is the recommended minimum at +/-4 sigma from the mean, with 3 – 5 micro-inches being typical.

The immersion gold deposit is porous by definition. It does offer very good protection to the underlying nickel, but over time the porosity of the deposit results in the passivation of the nickel surface and the wetting forces will be reduced. Of course, this process should take years to occur, but if the gold coating is too thin (below the minimum requirement), it will occur sooner and affect the solderability. 

Andy Mackie: What advantage does gold have over silver or other metals?

Lenora Toscano: Again, gold has good tarnish resistance and solderability after storage because it does not form an oxide or hydroxides, so it is unaffected by temperature and storage conditions that might reduce the shelf-life of the other finishes. It meets requirements for lead-free (Pb-free) assembly while offering a coplanar surface that is both solderable and aluminum-wire and gold-wire bondable.

Gold has good electrical conductivity, and produces a contact surface with low electrical resistance. Electroplated gold is also an excellent etch resist.

Electroplated silver is not widely used in the printed circuit industry. Under certain conditions or electrical potential and humidity, silver will migrate along the surface of the deposit and through the body of insulation to produce low-resistance leakage paths. Alkaline cyanide baths for silver electroplating are highly toxic.

Immersion silver is susceptible to problems if not correctly stored and even packaged. Packaging materials that contain sulfur or allow exposure to air will result in tarnishing of the surface (sulfide, sulfate, and chloride formation). High levels of surface contamination can detrimentally affect solderability.

As a supplier of electronics materials, Indium Corporation is constantly faced with customer requests for “halogen-free” (HF) soldering fluxes and associated materials. This is an interesting trend, but we face several challenges here:

1/ What is “halogen-free”? We have not seen any consistent message from our customers on what they mean by a halogen-free flux. As a materials-supplier this is an absolute show-stopper.

Based on several conversations with interested parties, my understanding of the IPC status is as follows, and apologies for any misunderstandings to Tim Jensen (Indium Corp.) and Tom Newton (IPC). The IPC’s 4-33a Task Group, which was looking at a universal halogen-free material standard (J-STD-709), saw a failure of a second ballot on the standard, even when it got downgraded to a guideline. The 4-33a group faced numerous differences of opinion: on what materials should be included; what halogen levels are allowable; or even whether a single component could be considered a "homogeneous material” to be ground up and analyzed for halogens and so on. The task of defining HF will now reportedly be taken up by two separate groups from IPC and JEDEC.

Meanwhile, in March of this year, the Japanese organization JEITA quietly released their understanding (ET-7304) of what is meant by HF fluxes and solder pastes, using a 1000ppm halogen limit. This definition is clearly at odds with the IEC's definition of HF. That is, 900ppm by weight maximum of chlorine or bromine atoms, or a maximum of 1500ppm of both: the so-called “9-9-15” limit. .

2/ Which halogens? The strict definition of a Group VII element (halogen) is one of Fluorine (F), Chlorine (Cl), Bromine (Br), Iodine (I) and radioactive Astatine (At). From environmental reasons, chlorine and bromine in halogenated fire-retardant (HFR) materials that emit dioxins and similar compounds when heated should be eliminated. However, some customers are also throwing fluorine and iodine into this definition, too. This may be based on fears of electrical reliability, but from my perspective the customer is becoming defocused from the necessity of meeting environmental concerns.

3/ Does halogen = halogenated fire retardant? Not every halogen found in an electronic material is an indicator of a halogen-containing fire retardant!

Greenpeace is the main driver behind this, and I have, to date, been unable to get a response from them on how they will detect halogens on circuit boards. The fear from our customers, and our customers’ customers, is that an electronic device (iPhone / flat-screen TV or other) will be obtained by an environmental group; pulled apart; and X-ray fluorescence (XRF) used to detect halogens. The minimum sample size that can give a quantifiable result for halogen-free is reportedly 2grams: contrast this with the milligrams of material (residue) present from a no-clean flux in a cellphone, and you can see the issues in quantifying halogen levels based on flux residues. We can’t do it reliably.

4/ How can we confirm “zero” halogens? Contrast the JEITA standard with the requests from many customers for zero halogens / “no intentionally added” halogens / “elemental halogen-free” fluxes or some such. However, since many customers insist on third-party data-reporting, we are reliant on these analytical labs to reliably give us data. One of the challenges we face is when, for example, a lab reports “63ppm of chlorine”, based on a reported limit of detection (LOD) of 50ppm. Our customer is outraged: “You said it was halogen-free!”

Those of you familiar with the statistics of analytical chemistry will immediately see the two fallacies here: the first is that they have reported not the method detection limit (MDL), but the much-lower LOD. The MDL is a function of analytical equipment PLUS the errors in sample preparation and handling. The second fallacy is that you can not report 63ppm as a reliable, reproducible number, since the limit of quantitation (LOQ) – the limit at which you can actually give a figure for the concentration – is more than 3 x the MDL. The limit of analytical capability to reliably quantify the amount of halogen present is therefore around 150ppm or greater.

Instead of reporting “63ppm halogen”, a more accurate statement is: “In our single test, we found a small peak in our spectrum at the same elution time as a halide-ion. It may be a halogen, or it could be one of the millions of anionic organic species that elute at the same retention time. The quantity found is well below the method detection limit, so we have no way of knowing if it is from contamination during the sample preparation, and we certainly can not tell how much is present.”

5/ What is a ‘homogeneous material”? Some customer standards require the level of halogen in a homogeneous material to be reported. We can probably safely say that a flux is a “homogeneous material”, but is a solder paste truly homogeneous? Both JEITA and Indium Corporation can agree that the flux-content needs to be the focus of the analysis, but a solder paste supplier may, for example, take the analysis of a 90%w/w metal solder paste, and report the results as “890ppm chlorine”, knowing that the level in the (10%) flux is 8,900ppm chlorine, essentially diluted by the 90% metal content.

Conclusion:

As a global electronics materials supplier, we at Indium Corporation can see three possible solutions to all these dilemmas:

a/ Adopt the JEITA specification – even though it goes against the 9-9-15 EIC recommendation. This allows us to be on a level footing with our Japanese competitors, but appears to put us at odds with the needs of some of the semiconductor assembly and electronics assembly industries.

b/ Adopt a three-tier specification based on the IPC/IEC recommendation – the Indium Corporation approach is given here (below).



Why three levels? Because our more discriminating customers are telling us that truly halogen-free fluxes are simply not as effective as those that contain small amounts of halogen. For those who are concerned about end product reliability, a “halogen-compliant” tier allows the best of both worlds.

c/ Report the atomic chlorine and bromine levels present in the flux component, and allow the customer to choose what they want, based on this.

If you are a user of Indium Corporation materials, or even a competitor of ours - what makes most sense here? Or is there a fourth or fifth way?

Cheers! Andy

Had some very interesting conversations at the IWLPC show last week, as always: one discussion was with my good friend Jeff Schake of Dek. He knew I had done some work a few years ago on a system for preventing solder paste drying out on the stencil by maintaining a set solvent vapor pressure, or “%RS” (the solvent equivalent of a %RH) over the paste.

Almost as a byproduct to my engineering work, I realized that I would need a tool to differentiate between solder paste that was losing solvent, and one that was simply “thickening up” due to time-dependent rheological changes (TDRC). TDRC includes phenomena such as thixotropy and rheopexy. Thixotropy, or shear-thinning, will be familiar to everyone who has had to shake a glass bottle of tomato ketchup in order to get the darned stuff to come out of the bottle: the ketchup has a weak gel-like “structure” that can be broken down to a low viscosity structure by simply shaking it. The (retardation) time it takes to break the “structure” down can be modeled by a simple exponential function based on the rheological equivalent of a half-life, as can the (relaxation) time. "Relaxation" here means the rebuilding of the gel-structure with time of the paste when it simply sits with no shearing forces, and the rate at which it rebuilds is dependent only on the diffusion kinetics -  [just in case you read the title of this blog entry and had mental images of solder paste tanning itself in the sand on Palm Beach].

The no-clean solder paste studied certainly did change in viscosity with time, but the change was reversible, fitting the rheological model rather well (data shown below) but demonstrating that irreversible drying (solvent loss) was NOT the prime cause of the stencil clogging and other problems seen.


Contrast this with the water-wash paste (data shown below), which even after a couple of hours showed signs of irreversible performance degradation that could be prevented by maintaining a controlled atmosphere as a specific %RS over the paste surface during its stencil-life.




 

Most no-clean pastes these days require little or no kneading (stirring or printing on the stencil) before they are used, but as a rule of thumb:  the more kneading a paste requires before it is useful – the less time it can be left on the stencil between prints.

Mechanistic insights like this are also helping us to develop improved wafer-bumping and flip-chip solder pastes.

Cheers! Andy

Why 8 random things? Because that’s the number of random things I’ve got listed below, that’s why – do I look like Letterman?

OK, so I spent this week closing some business in California, and also 3 days at the very well-attended and immaculately-organized IWLPC show, which is starting to mutate into the WLP and MEMS show, in the same way that Semicon West budded into the Semicon West plus Solar Wild-West show in 2008 and 2009. I will say a big thank you to Lee Smith of Amkor and Dan Baldwin of Engent for their excellent and worthwhile training programs - they have a lot to teach us. Here’s some other stuff I learned: 

1. From Dr Rao Tummala’s Keynote Speech: Moore’s Law may be leading the smaller and smaller revolution, and Packaging is severly lagging behind (no surprise to anyone who’s been watching the ITRS for the last five years), but the real surprise is how the overall system that the silicon chip and the package are housed in is similarly dragging its feet. See 7. (below) for some insight into the "why" here.

2. If you are chairing a session, you really will need a good 30minutes start on the session, to ensure everything is in apple pie order. Corollary: Just because the projector is working, doesn’t mean it is connected to your laptop, and my apologies to Dr Raj Gupta of Volant Technologies for slowing him down. He did take the slight delay to starting his presentation in his stride, however, which shows what a gentleman he is!

3. WL-CSP for high-end, fine pitch processors with ULK dielectric layers may never get off the ground, and the competition is cheap, inorganic interposer technologies that have CTE’s close to silicon. Getting low pitch, high I/O conductive holes in glass, however, is no picnic. And would all those muttering about “Flip-Chip on CBGA?!” please keep their comments to themselves: what’s old is new again.

4. If you ask the same question of experts from 3 different marketing research companies, you will get three radically different answers, each within a certain range of “correct” depending on how they view the market. A summary of all of the answers will be very helpful in determining a course of action, and you will learn a lot about the extent to which each organization is blind-sided in their market view.

5. The phrases “killer app” and “smaller, cheaper, faster” have died the death. Yay! I don’t mourn the latter, but I really didn’t get a good feel for what actual DEVICE market need is driving WLP and 3D integration. Yes: Toshiba camera modules in 2007. 8 stack DRAM modules in 2008…but the sensor / logic / RF / NAND / DRAM / MEMS / bacon / lettuce / tomato stack up envisioned for 2013 may be way off base: beaten back by simple throughput, KGD and heat-dissipation issues.

Corollary: Speed of technology change is fine in and of itself, but what concerns me is the VELOCITY of change. As you’ll recall, velocity is a vector quantity, necessitating that you state the direction of motion. Going fast down a dark alley is never a good idea. Speaking of which...

6. DARPA does the freakiest things! Dr Alan Rae (one of the presenters at the Plenary MEMS session I chaired) shared one of the ways the US government is planning on spending our tax dollars. Radio-controlled flies. No Halloween joke. The basis of this project proposal is to put a chip into an insect (e.g. your regular Musca Domestica: the common house fly), and use the energy (motion/heat/electrochemical) generated by a baby fly… OK, a maggot (thank you, John Fowles)… to power the device, which will have nanowires embedded in the insect’s nervous system. These microwires will interface with the fly’s nerves as they grow, allowing you robotic control over the fly, so it goes wherever you want it to.

Over a glass of wine, Alan and I saw some issues here: most particularly as said fly will also have some degree of freewill. One can envision the vexed fly oscillating in some metastable state: torn between the radio-control chip telling it to continue spying on a terrorist cell, and its innate instincts telling it to commence chowing down in the terrorists’ outhouse. “HELP MEEEE!”

7. There is no attempt made yet to shrink the human finger or the human eyeball, so input and output devices will remain severe limitations. Witness a recent text message to my boss on “Fkuxes” this week. Ross Berntson responds immediately “Fkuxes is a new product line for us ;)…” Yeah, LOL! But you see the problem: Blackberry keys and human thumbs…

After chatting to my favorite futurist, Dr Ken Gilleo (pictured right with Leslee Johns) this week, I think we’re safe in assuming that, based on all the above, the next step by 2020 will be DIS. Device in Skull. Bluetooth for the central nervous system: it will look like telepathy. Nanowires will communicate with visual, vocal and aural nerves, and the whole thing could be placed in a sinus or some other pretty vacant bio-real-estate. You can use a microturbine to harvest the energy from breathing. Again, shunting (not merely tapping into, but SHUNTING) and switching the nerves from DIS to brain will present problems, but I’m sure we will see some biotech answers to this – binuclear Schwann cells or some such. An idea not to be sneezed at. Not that sneezing would be a good idea anyway, come to think of it. Which reminds me....

8. Extremely important: Do not make a funny comment to Alan Rae when he just took a bite of dessert. Particularly during the keynote speech. Sorry, Alan. Was funny, though, right?

Cheers! Andy

I just sat down to talk to Tommy Acchione (pronounced “akki-OWN”) Applications Engineer with Indium Corporation’s  new product line, Reactive NanoTechnologies’ (RNT) NanoFoil^®, about the technology, and its offerings into the semiconductor, power semiconductor assembly, LED and display assembly industries.

[ACM] First of all: welcome to Indium Corporation! Can you tell us, in just a few words, what the basis of the RNT Technology is?

[Tommy Acchione] NanoFoil^® technology is a thin metal sheet (“foil”) made up from alternating ultrathin layers of aluminum and nickel (Al and Ni). The reaction between these two metals is stoichiometrically very simple:

            Al+2Ni -> AlNi₂

And extremely exothermic (heat-generating). This reaction (see picture) is started by a very localized heat or other high-energy source, such as a 9V battery or even a laser beam. For a fraction of a second, the alternating thousands of sandwiched layers reach temperatures as high as 2000degC, and this isotropic heatwave radiates away from the initial hot-spot through the foil at speeds of about 5-8meters/second.

Just banging two lumps of Ni and Al together will never initiate a reaction this intense, as the two large pieces of metal act as very effective heat sinks, but by layering the metals together, the heat-generating reaction propagates by allowing the adjacent layers of Ni and Al to rapidly interdiffuse, so giving out more heat, causing the nearby layers of Ni and Al to interdiffuse and so on.

[ACM] How are these materials manufactured?

[Tommy Acchione] First, we pull a high vacuum, equivalent to those vacuums found in outer space, then we sequentially deposit the alternating layers by a sputtering process onto a specially-made metal block.

For a bonding material, a layer of a specialized brazing material is initially deposited onto the metal block, then the Al and Ni are put down, then a final capping layer of braze is deposited. The initial brazing layer both enhances subsequent bonding and also helps with easy removal from the surface of the metal block.

[ACM] I understand that the uses of these materials are expanding all the time. Can you give some examples that you can talk about?

Well, as you know we have about 30 patents on this technology and 35 outstanding patent applications, but I still have to be careful talking about newer applications, which are emerging all the time.

The biggest uses are in sputtering target manufacture (which is a little ironic, since that is how they are made!); Component mounting; and what we can call “reaction initiation”, or “energetics” - things requiring an instantaneous heat-source.

Sputtering Targets: For sputtering targets of non-refractory metals, standard indium or diffusion may be the preferred method. For most refractory metals and ceramics, solder wetting and CTE mismatches make bonding with standard processes difficult. NanoFoil^® allows for these materials to be bonded at room temperature, thus removing any CTE mismatches during bonding or subsequent cooling processes.

However, as targets get larger for flat panel displays (and we are seeing needs for up to 3m x .4m targets with higher generation depositing), indium starts to become too weak to take the weight of the indium-tin oxide (ITO or InTO) target itself, and only the strength of a NanoBond^® is sufficient to hold the target in place. Another key factor is that a manual bond of a large target to its backing plate starts to become simply physically unwieldy for an operator, as its size and weight increase. NanoFoil^® becomes the elegant and simple solution here.

Component Bonding: One major market that we are seeing is in component bonding. I can’t talk too much about this, but for high-brightness LED’s (HB-LED’s) and photovoltaic concentrators (CPVs) there is a growing demand for a high-temperature stable, thermally-conductive flux-less bonding material able to provide low junction temperatures over the lifetime of the device.

Energetics: Here we are talking about fuses and timed devices, with specially-shaped initiators that take advantage of the ignition properties and the reaction rate and energy produced by the NanoFoil^®.

[ACM] Tommy: very interesting! Many thanks for your time.

Steve Adamson of Asymtek

I had the chance to discuss fluid dispensing recently with my fellow-Brit, Steve Adamson of Asymtek.

After you've reflowed solder in contact with a flux, you're always left with a certain amount of flux residue. There are no clear industry guidelines on how you refer to the residue, and new terminology is emerging all the time. If you leave it up to me, here is what I recommend : 

1/ "No clean" flux residues:

- Standard Residue:  >40%
- Low Residue (LR): Between > 10% to 40%
- Ultralow Residue (ULR): Between >2% to 10%
- Near Zero Residue (NZR): Between 0 to 2%

Each % is given as the weight percent of flux residue after a real reflow process, and refers to the fraction of the raw flux, or flux component of a mixture (such as solder paste or metal-filled epoxy). Note that the exact amount of residue will vary with the reflow profile; the mass of flux or solder paste studied; and the rate of gas flow over the sample material, as well as secondary factors, such as the oxygen level in the reflow atmosphere.

Thermogravimetric analysis (TGA) is a pretty poor method for determining post-reflow residue levels. Results from the use of a platinum TGA sample cup with nitrogen flowing over it have been found in our testing to vary significantly with the mass of sample present, probably because the headspace in the cup acts as a "dead zone" for entrapment of vapor: TGA may therefore give artificially high % residue readings, compared to the results on a flat leadframe or other substrate.

From the viewpoint of a standard semcionductor assembl process, now consider the situation of a low-clearance direct chip attach "flip-chip" or package-on-package application, where the flux is essentially entrapped in a "cage" of I/O's, sandwiched between two flat diffusion barriers. As well as issues of flux residue, this also raises the question of how the electrical properties of the flux will be affected, if more of the solvent and other volatiles from the flux are trapped in the residue.

2/ "Water-soluble" (same principles apply for "Solvent cleanable") flux residues:

- Water-soluble: Residues can be truly dissolved in water to leave a transparent liquid: the color of the this rinse liquid is immaterial,
- Water-dispersible: Non-transparent rinse liquid with any hint of translucency or turbidity

I know that the differences here will be very dependent on rinse-water quality and temperature; chemistry of any cleaning agents; stage of bath-life and so on, but to my mind, if the rinsed liquid is not transparent, then the solids from the flux must be suspended as fine particulates. These particulates usually have refractive indices different from the bulk liquid: the result - turbidity. There may be a means of bath-life end-point determination by turbidity or dynamic light scattering (DLS) or a similar technique; possibly in combination with the standard refractive index measurement that is most commonly used.

In conclusion, note that ULR and NZR fluxes are showing increased usage in flip-chip applications, since these types of material interfere less with the curing of underfill polymers. NZR fluxes are becoming critical for copper-pillar bumping applications.

Just my thoughts - let me know what you think.

Cheers!   Andy

Got contacted last week by Tony Hilvers of the IPC (Association Connecting Electronics Industries). Tony tells me that the Canadian Government is considering banning some rosin and resin-based chemicals that may be of interest to flux formulators for both no-clean; solvent-clean; and even water-wash solder pastes and fluxes. The Canadians are at an early, investigative, stage here: allowing the various interested parties six months to respond.

My initial, knee-jerk reaction is as follows:

1/ While Tony and the IPC's rapid response is commendable, note that we in the electronics industry are not alone. Even a cursory Google search shows that the vast majority of these types of material are used in the following, multi-billion dollar, industries:

- Paper manufacturing

- Cosmetics

- Adhesives and glues

- Synthetic rubbers

- Coatings

- Printing inks and toners

We in the electronics industry are relatively small fry: combining our voice with that from these other industries, may give the Canadians pause for thought.

2/ If you're wondering why I'm so interested in this, it's simply because after the Pb-free switch in most of the Electronics Assembly industry, I am now seeing the Electronics Assembly and Outsourced Assembly and Test industries still in turmoil over the exact meaning of "halogen-free" solder fluxes. Industry sources are telling me that there is a strong movement to pull back from  the absolutist "zero tolerance for halogens of any kind" to a more rational call for a certain limit to them, based around the standard "9-9-15" halogen classification. The hard truth is that truly "no-intentionally-added" (NIA: that is, TOTALLY halogen-free) solder fluxes may, in some instances, simply not be as effective as those containing moderate amounts of halogens.. More on "halogen-free" in a couple of weeks.

3/ Eliminating rosins and rosin-derivatives, including materials that may be present in naturally-occurring rosin products, may not only have the beleagured Canadian timber industry up in arms, but will probably result in another protracted round of setting of allowable limits for "proscribed substances" some of which.... umm.... occur naturally.

All comments, corrections and clarifications gratefully received.

Cheers!  Andy

Dr Jennie Hwang

I recently had the opportunity to discuss several issues in Pb-free die-attach and other solder applications with Jennie Hwang PhD, DSc, and world-renowned consultant in solder and  electronics assembly processes. 

Cheers! Andy

Figure 1: 15% Voiding with air reflow

Figure 2: ~0% Voiding after vacuum reflow

Figure 3: Multiple voids

While at the Semicon West 2009 show in July, I had a chance to sit down with Herr Klaus Roemer of Pink GmbH. PINK is most famous in the die-attach and power module manufacturing world for their reflow ovens with vacuum, but are also known in the medical and aerospace industries for manufacturing extremely high precision, one-off, vacuum equipment for applications as diverse as particle-accelerators for ion bombardment, and large-volume chambers for helium leak-detection. I asked him some questions about Pink vacuum soldering technology.

Cheers! Andy

... and we're back now with the real situation of solder powder size and its effect on solder paste rheology.

Size distribution - Real solder powder is not monodisperse (single diameter), but has a spread of sizes (typically approximating to a log-normal distribution). Generally, the wider the distribution, the higher the maximum packing fraction. This can be easily understood by looking at the picture from the last post (below) and imagining tiny spheres fitting into the little interstices between the particles: they would have to be around 1/10 of the diameter of the larger spheres. Theoretically, you can get 0.99 or even higher packing fractions with a very specific multimodal distribution, but you never see this in real life.

Boundary layer - Every time a fluid flows over a surface, the part of that fluid closest to the solid surface does not move, relative to the surface. On a molecular level, individual molecules are diffusing in and out of this so-called "static boundary layer", but essentially, the fluid right next to the surface is completely immobile. The fluid just above this static layer is moving slowly, and the next layer out moves faster still, until the velocity is the same as that in the bulk fluid. "Ok" you say, "so what?" Well the fluid around the solder particle therefore forms a kind of shell that is almost like an extension of the particle into the fluid, and the thickness of the shell is not dependent on the particle size. Complicating things further is the fact that solder paste fluxes are plastic, not Newtonian, so the boundary layer goes out even further. To sum up: smaller solder particles have a "virtual shell" around them that means you need a lower metal weight percent to get the same rheology.

Non-sphericality - The sphere is an ideal solid, and any deviation from perfect roundness causes an increase in the "k" factor, which is 2.5 for spheres, and increases as the particle become sincreasingly deformed, more and more fluid being trapped either within or around the particle (see picture). Most powder these days is spherical, so it's not a big deal

Chemical reactions - Activators (see previous posts) are very good at removing oxides from metal surfaces. There is a myth that there is a magical temperature at which the activation (metal oxide plus activator) reaction occurs, but that's exactly what it is: the myth of the "activation temperature". How can I demosnstrate it's a myth? Simply because solder paste has to be stored in a refrigerator, or else it increases in viscosity with time through the so-called "concretion" reaction which is just the slow reaction of activators with metal oxides to form solid reaction products, just in the same way that water hydrates cement to swell the crystals and cause them to change shape and grow, interlocking together into a solid mass.

Air - No matter how hard you try, you will always have a little air mixed in with your solder paste.

A complicated answer to a simple question!

Oh, and by the way, once you've embarked on a study of solder paste rheology, there is is the little matter of "artefacts". A subject for another time....

Cheers!  Andy