Indium Corporation Blogs

Derivation of the Weibull Graph

Folks,

Last time we introduced Weibull analysis. Let's now derive the relationships needed to calculate the slope, beta, and characteristic life, eta.

F(t) is the cumulative fraction of fails, from 0 to 1. By choosing Ln(t) as x and LnLn 1/(1-F(t) as y, we would expect a straight line.  See the derivation above.  It can be shown graphically that this fact is so.  So if we plot F(t) versus t on logarithmic graph paper, the slope of the line will be beta. To determine eta, let t=eta, in the first equation below.  The result is F(t) = 1-e^-1 = 0.632.  So the time at which 63.2% of the parts have failed, is eta, the characteristic life.

Let’s consider some data comparing SAC305 and SACM (SAC105 with about 0.1% manganese) BGA solder balls in thermal cycle testing.   The primary test vehicle employed was a TFBGA with NiAu finish mounted on PCB with OSP finish.  SACM is a new breakthrough soldering alloy that has better drop shock resistance than SAC105 and comparable thermal cycle performance to SAC305.  The data follow.  The first column is the sample number, the third and fifth columns are the number to thermal cycles to fail for SAC305 and SACM.  The second and forth columns are rank of the sample number.  One would think that the first number in the second  column would be 100*(1/15) =6.67%, as it represents the cumulative percent of samples failed, but a slight correct factor is needed.   By plotting the log log of rank as shown above (LnLn1/(1-F(t)) vs log of cycles at failure, we get the Weibull plot.  The slopes of the best fit line is equal to beta and the number of cycles at rank = 63.2% is eta.

Fortunately software like Minitab 16 does the plotting and calculating of beta and eta automatically.  The results are below:

We see that the shape (beta) for SAC305 is 1.76 and that of SACM is 6.09, the scale or characteristic life (eta) is 1736.8 and 2016.8 respectively.  These results are a strong vote of confidence for SACM.  Its steep slope (high beta) suggests a tighter distribution, with more consistent solder joints and its characteristic life (eta) is also slightly greater.

I plan on teaching detailed workshops on this topic.  I will keep you posted.

Cheers,

Dr. Ron

While on a recent trip to Malaysia, I interviewed two colleagues regarding trends in semiconductor assembly. My previously-published interview with Sze-Pei Lim appears here.

This time, while on a visit to a logic device manufacturer in the North West, I [ACM] talked briefly to Sehar Samiappan [SS], Indium Corporation's Area Technical Manager, about our recently-developed water-soluble pin-transfer Ball-Attach Flux, WS446-NRD, which is designed for BGA applications of 0.5mm pitch, and greater than 1500  I/Os.

[ACM] What is the origin of WS446-NRD?

[SS] The development was driven by a customer need for a guaranteed good quality BGA (ball-grid array) solder joint, but with reduced environmental impact. Our very quality-focused customer uses several different suppliers of organic FC-BGA substrates with copper OSP pads. The customer had serious concerns about occasional poor solderability of SAC305 solder spheres onto substrates. The key defect seen was poor wetting onto the OSP-coated copper pad, which would give rise to variability in both joint strength and bump coplanarity,  and even (in worse cases) missing-ball / “big ball” effects. Some of the pad finishes were seen to be highly oxidized, severely restricting solder wetting during reflow. Variability in the surface finish was found to be not just from supplier to supplier, but also showed up as lot-to-lot variability from lower cost suppliers.

Some of the differences seen could be attributed to the method of mask desmear from the C4 “cage” of the flip-chip (top side) area, which was either a plasma-based desmear or an oxidizing inorganic acid dip, that was clearly having effects on solderability of the opposite (bottom) BGA side of the substrate.

[ACM] What steps have customers previously taken to get around this issue?

[SS] This is a serious issue for many ball-attach flux users, and some customers have gone to the lengths of using a special fluxing step to remove contaminants such as oxide and OSP (organic solderability protectant) coatings. These liquid fluxes are very reactive, but require  separate spraying, reflow, and cleaning stages that add cost and time. The halogenated ball-attach fluxes of the WS446 series have an established good chemistry that allows wetting of SAC105, 305, and 405 onto a variety of metallizations. In the semiconductor assembly industry, the WS446 fluxes are well-known in Taiwan, and throughout South East Asia, for their good solderability and long pot-life in a variety of FC-BGA applications.

[ACM] What was different about WS446-NRD, and why was it developed?

[SS] WS446 fluxes are all colored, using a bright red dye, so the flux can be seen by eye and automatically detected by vision systems. Red coloration also allows automated ball-attach flux dipping replenishment systems to detect flux levels. Normally, colored fluxes are not a problem, but the customer had some environmental concerns with the red color contaminating the water-wash equipment, and building up in their water-recycling system. WS446-NRD was developed from the basic WS446 flux series chemistry, but  without the red dye. The solderability performance of WS446-NRD was excellent, eliminating the variations in OSP solderability without requiring any additional processing steps. WS446-NRD also passed internal process and product requirements, such as cleanability, and the customer was very pleased with Indium’s ability to rapidly tailor a chemistry to their specific requirements.

[ACM] Sehar: thank you. I look forward to sharing a durian with you again when they are back in season.

每个客户在测试评估焊锡膏时，一般都有自己的一套办法。在通常的测试中，虽有许多相似的测试、方法，但也不尽相同。 最简单最基本的测试，一般有润湿测试wetting test, 锡球测试solder balling test， 坍塌测试slump test(hot slump & cold slump), 印刷测试printing test, 表面绝缘测试SIR test, 等等。 根据不同的侧重点，一般做完这些基本的测试后，客户们会做进一步不同的测试，比如有各种各样的printing test, 测试印刷的稳定性，一致性，和下锡量； X-ray空洞测试，BGA, QFN；热循环测试 temp cycle test；跌落测试drop test……

最近有一个客户和我们在交流slump test。 因为这个客户现在使用的锡膏有时候会有briding的现象，而他们的产品越来越微型化，pitch越来越小，所以工程师们就按照IPC slump test的指导对新的锡膏做测试。 我们了解了具体情况后，就建议客户工程师除了做一两个coupon的简单slumping测试，也做整板的印刷和slumping/briding测试；同时，我们建议客户提高印刷速度，从25mm/sec提高到50mm/sec或以上。现在很多免洗无铅锡膏，都是为高的印刷速度而设计的，因为这些产品的主要市场是在亚洲high volumn low mix的消费电子产品上，所以印刷速度要快，不能成为生产线的瓶颈(bottleneck)。 适当较快的印刷速度，能够使锡膏的总体最佳性能更好的表现出来。

客户按照我们的建议，得到了最好的测试结果。

Cheers!

Pic: Google Image 

Folks,

Let's look in on Patty......

Patty was just finishing a report on work that she and Pete had performed with a team of her ACME colleagues  on reducing the Head-in-Pillow (HIP) defect at a plant in Minnesota. HIP can be caused by printed circuit board and/or a BGA warping during reflow, and, occasionally, by poor wetting BGA solder balls. Fortunately, this case of HIP was due to just a little warping, so replacing the solder paste with one of the new formulations that was designed to minimize HIP had done the trick. Ten thousand boards were produced with no detectable HIP defects.

As Patty wrote the last sentence in the report, she gazed out the window at the dusting of snow that had fallen. She liked living in southern New Hampshire and was thrilled with the house that she and Rob had purchased six months ago in Exeter.  She had to admit that Phillips Exeter Academy was also a draw. She hoped her 18 month old sons, Michael and Peter, would attend high school there, when the time came.

Patty was jarred from these thoughts by the ringing of her phone. She looked at the caller ID and saw that it was Mike Madigan, the CEO of all of ACME. Her stomach tied up in a knot. Sam, her boss, had alluded to the fact that senior management wanted to make her a VP. He asked if she had any requirements to accept such an offer. She said that she wanted to stay located where she was and she wanted Pete to be on her staff. Still, she was a bit nervous about such a big change.

“Patty Coleman, how may I help you?” Patty answered.

“Coleman, this is Mike Madigan. Congratulations, you are our new VP of Technology and Productivity. You will report to me, but, since you are staying in New Hampshire, I want you to report dotted line to Sam for day-to-day things. Coleman, don’t let me down. You are the youngest VP in the history of ACME by 5 years,” Madigan said.

Patty was a little put off by his gruff manner, but had been told to expect it.

“Thank you Mister Madigan, I’ll do my best,” Patty responded.

“I already have an assignment for you,” Madigan went on.

“You have done great things by improving line uptime at many of our sites, and profitability is up everywhere, but I sense we are still missing something. Do you know why?” he asked.

“Because the correlation between profitability and uptime is not as strong as one would like?” Patty asked.

“Coleman, I’m already glad I promoted you! That is exactly my concern.   Explore the situation, fix it and give me a better metric. I want all sites to use this new metric so I will know which locations to focus on. I want a status report in 3 weeks.” Madigan finished.

“I'll get right on it Mister Madigan and will have an update in 3 weeks or sooner,” Patty answered, exhilarated, but a little shaky.

“Good! Oh and Patty, call me Mike. It’s not the 1960s you know,” he chuckled as he hung up.

Patty hung the phone up feeling happy and stressed. She was glad to get the promotion, but knew she had to deliver.

Patty had thought about this productivity metric concern in the past. She knew where to start, she would call The Professor. She was surprised when he picked up on the first ring.

“Patty, it’s great to hear from you. How are Rob and the boys? We expect to see your sons here at Ivy University as students in 16 years,” The Professor chuckled.

After exchanging a few more pleasantries and sharing the news about her promotion, Patty got right to the point.  

“Professor, I need a metric that measures total productivity in electronics assembly. Uptime is a great metric, but it doesn’t correlate one-to-one to profitability,” Patty explained.

Patty expressed her surprise that no metric for total productivity was in wide use. They discussed the issue for a few more moments and then The Professor had a recommendation. “Read the NEMI (National Electronics Manufacturing Initiative) 1998 and the iNEMI 2011  Technology Roadmaps. Focus on board assembly and I think you will find your answer,” The Professor suggested.

After a few more pleasantries, The Professor had a request.

“Patty, I am getting a little award in Washington, DC. I have room for two guests at the award presentation. I was hoping you and Rob would come,” The Professor requested.

Patty said she would check their schedules, but was sure it would work out. She was honored that he thought so much of her and Rob.

As she hung up the phone, she went to ACME’s Tech Library in search of the iNEMI roadmaps. She quickly found the 1998 NEMI Technology Roadmap, but unfortunately only a summary of the 2011 iNEMI Roadmap was available. She thought she would read the 2011 Roadmap summary first. It was overwhelmingly impressive in its coverage of technology, at the wafer, chip, component, and board levels. The thoughtful inputs of over 575 participants, from over 310 organizations, were clearly evident. All of the current and emerging technologies were presented in detail.

“What a treasure of information,” Patty thought.

But she didn’t see an answer to her question.

So she went to the “Board Assembly” section of the 1998 Roadmap and in a few minutes she saw the answer: Board Assembly Conversion Cost in cents/I/O.

“What a simple concept,” she thought.

As she studied the document it became clear that about 30% of it focused on reducing conversion costs. Conversion costs were defined as all of the cost of assembly minus materials cost. To give this metric meaning, to enable comparisons between different manufacturing sites, the total amount of conversion cost for a manufacturing site was divided by the total number of input/output (I/O) terminals (i.e. component leads) assembled.

“This makes sense,” she thought. “You add up all of the non-material costs of assembly and divide by all of the leads you assemble. This metric shows how efficiently you assemble each lead.”

It then dawned on her that she had seen a metric like this before. She saw the notebook from The Professor’s workshop on Cost Estimating in her bookcase.  She grabbed it and flipped through it. There it was: non material assembly cost per I/O (NMACIO).

The great mystery to her is why the folks at NEMI didn't emphasize these types of cost performance metrics in newer roadmaps.

 Folks,

In gathering information on the status of lead-free soldering, some helpful friends pointed out two great sources of information: NASA and The Navy. NASA sponsored an impressive lead-free reliability investigation: "Lead-Free Solder Testing for High Reliability Project 1." This project is finished and the reports are online. There is a follow-on project: NASA DOD Lead-Free Electronics Project 2 which is currently underway. The Navy sponsored a project with ACI and the summary is here. I am currently studying these documents to help develop the consensus.  Some preliminary info follows:

Regarding -20^°C to +80^°C thermal cycling, NASA concluded:

“Under the conditions of this test, Sn3.9Ag0.6Cu (SAC) and Sn3.4Ag1.0Cu3.3Bi (SACB) were always more reliable than eutectic SnPb regardless of component type (CLCC, TSOP, BGA or TQFP).

It has been shown that conditions that highly stress the solder joints by maximizing the CTE difference between the PWB and the component will favor SnPb over SAC6. Conversely, conditions that minimize the stress put on the solder joints (e.g., compliant components such as BGA’s and/or a thermal cycle with a small delta T) will favor SAC over SnPb. The current test falls into the latter category and we can say with some confidence that the lead-free alloys tested will outperform eutectic SnPb under field conditions that are even less stressful than the -20 to +80^°C thermal cycle test conditions.”

For -55^°C to +125^°C thermal cycling, the conclusions were more cautious, likely because the data were mixed:

“The feasibility of using Pbfree solder alloys in place of SnPb solder alloys for new product designs was demonstrated under thermal cycle test conditions. Additional investigation and characterization of Pbfree solder alloys will be required as a segment of a Pbfree solder alloy implementation plan. The application/introduction of Pb-free soldering processes for legacy product designs is not recommended without extensive materials characterization and product design review.”

These results seem to be consistent with what others report, lead-free assembly produces good thermal cycle results for commercial-type thermal cycling, but the results are mixed for harsh environment thermal cycling.

For reasons that I will discuss in a post later this year, a common factor that is emerging in the area of copper-pillar microbump 2.5D and 3D joining, is the adoption of thermocompression (TC) bonding for flip-chip flux/microbump soldering. TC bonding is now being predominantly adopted instead of reflow. Some of you may have the same response as I got at iMAPS 2011 from one well-known expert in packaging technology. He looked askance at me when I mentioned TC bonding for flip-chip and retorted: “That’s for bonding wafers, not soldering flip-chips!”. Even good old Wikipedia (at time of writing) seems to have the same problem – basically that the industry usage of the term has moved into the packaging arena.

I spent a little time talking to people in the industry, and on Google, putting together a buyer’s guide for those of you looking at who-is-doing-what in TC bonding. This is just a prototype guide and necessarily incomplete – if I have missed your company out then I apologize, and will add it in: just give me all the details!

Folks,

When the industry was preparing to transition to lead-free solders almost ten years ago (can it have been that long), tin-bismuth solders were serious candidates. Their low melting point, of about 138C, made these solders interesting candidates to replace tin-lead solder. However, if contaminated with lead, tin-bismuth solders can produce a eutectic phase that melts at 96C. In such situations the resulting solder joint exhibits poor performance in thermal cycle testing. Since early in the transition to lead-free solders it was expected that there would be numerous components and PWBs with lead-based surface finishes, this property made tin-bismuth solders unacceptable.

Another aspect of tin-bismuth solders is that they expand on cooling. This phenomenon can result in fillet lift in through-hole solder joints.

However, as we are now well into 2011, almost no components or PWBs have lead-containing finishes and many portable electronic devices have no through-hole components, so it may be time to reconsider tin-bismuth for some applications.

Some years ago, Hewlett Packard (HP) had performed work to show that adding 1% silver to tin-bismuth solder enabled this alloy to outperform eutectic tin-lead solder in 0 to 100C thermal cycle testing. Even at these low reflow temperatures, HP demonstrated solder joint strength with SAC BGA solder balls that was 65% that of tin-lead solder. Expanding on this work, Indium Corporation's Ed Briggs and Brook Sandy performed stencil printing and reflow experiments consistent with the requirements of current miniaturized components using this 57Bi-42Sn-1Ag solder. All of their results were promising. Ed presented a paper at SMTA Toronto,summarized the Hewlett Packard work, and reviewed the results of this new work.

So for applications consistent with 0-100C thermal cycling, 57Bi-42Sn-1Ag solder may be something to consider if the high temperature of SAC solder paste is an issue to components or PWBs in a product

Cheers,

Dr. Ron 

PS: Read my follow-on posting about bismuth.

Folks,

Back in October, I posted comments on lead-free reliability.   In this post, I mentioned that I chaired a session at SMTAI on “Alternate Alloys”. At this session, Greg Henshall presented a paper on the  Low Silver BGA Sphere Metallurgy Project. This paper was a collaborative effort of six companies.  In addition, Richard Coyle presented an overview of the work of three companies titled “The Effect of Silver Content on the Solder Joint Reliability of a Pb-free PBGA Package.” Both projects evaluated lead-free thermal cycle reliability as a function of silver content and compared the results to SnPb reliability.

Both papers concluded that, as far as 0^oC to 100 ^oC thermal cycle reliability is concerned in their experiments, SnPb < SAC105 < SAC305 < SAC405

Coyle’s presentation summed it up best:

“Each of the SAC alloys outperformed the SnPb eutectic alloy in every test, including the long, 60 min. dwell time test. This tends to diminish the argument that SAC is less reliable than SnPb.”

To be clear, it was two papers by two different groups coming to the same conclusion. It would probably be a stretch to say that the conclusions of either group were “almost unique".

Denny Fritz responded to this blog post with this point:

“No one I know will dispute your ranking of SAC better than SnPb solder using the commercial temperature cycle Henshall uses – 0C to 100C. But, harsh environment electronics have to perform to either -40C or -55C, and most use a top end cycling temperature of 125C. IT IS IN THAT WIDE THERMAL CYCLE TESTING THAT SnPb outperforms SAC solders.”

Denny’s point is well taken. I believe it can be said that SAC alloys have demonstrated acceptable reliability in commercial, non harsh environments (i.e. mobile phones, PCs, consumer electronics, etc.) However, it cannot be said that acceptable reliability for SAC has been established for military (RoHS exempt) and harsh (i.e. automobile engine compartment) environments.

A short time ago, Werner Engelmaier wrote an article on this topic (Global SMT Vol 11, No. 1, Jan 2011, pp 38-40.), which among other things he said:

“Of course, ‘Dr. Ron’ selectively picks data agreeing with the point of view he held from the inception of the Pb-ban under RoHS on a plot with an expanded x-axis overemphasizing the differences and supporting a solder joint reliability ranking of SnPb < SAC105 < SAC305 < SAC405.”

Ouch! My motives were not quite so nefarious, I chaired a session and wanted to share the conclusions.

However, Werner makes good points in his article, data exist disagreeing with this reliability ranking and he suggests some good points on how to conduct reliability tests so that comparisons can be made between data sets.

In reading some of his other articles, I was delighted to find that we actually agree on the state of lead-free reliability in thermal cycle testing. Here is a statement of his circa 2008 (Global SMT, Vol 8., No. 8, Aug 2008 pp 46-48.):fting, and n

“It has been 2 years since the infamous ban of Pb-solders under RoHS. What have we learned? For solder joints, no dramatic differences in reliability are apparent. The data bases for LF-solders have grown, the favored LF-solders might be shifting, and no reliability model exists as of yet. Nevertheless, progress has been made.”

Cheers,

Dr. Ron

A quick trip to discuss roadmapping with one of the world’s top processor manufacturers, and a visit to discuss Pb-free power die-attach materials, left me with a few hours to spare at LAX.

This time around I was trying to work out how much package-on-package (PoP) solder paste we would expect to see for a waferlevel CSP (WL-CSP) or a BGA dipped to half height. The need for some deep thought was driven by a customer who asked at what point a PoP dipping paste needs to go from a type 4 to type 5, 6, 7 and so on (however you define them), based on the PoP/CSP pitch or ball diameter. Good question.

To start with, in order to get consistent quantities of paste on each sphere, the PoP paste metal loading needs to be well below the point at which rheopectic behavior can expect to be seen (that is, much less than 50% by volume of solder powder metal). By doing this, you pretty much guarantee a “monolayer” of solder paste powder particles (radius r) coating the CSP or BGA sphere (radius R). Figure 1 shows the kind of result that is typical for a good paste: in this instance our halogen-free PoP paste Indium 9.88-HF.



Figure 1: 0.4mm pitch CSP with PoP paste

If the metal loading is too high, even at time zero, you will start seeing large variations in the amount of PoP solder paste adhering to the surface of each sphere (bump), even on adjacent spheres: the small amount of paste that is picked up during the dipping process adheres to the main solder sphere in uneven clumps. This is why standard type 4 printing solder pastes just don’t work in PoP applications: not only is the particle size too big – the rheology is all wrong.

If R>>r, then a reasonable first order approximation is that you can treat the sphere surface as planar and so model the number of solder particles based on a series of hexagonally close-packed particles (Figure 2 gives the definitions).
 

Figure 2: Definitions for the PoP paste dipping process

Using the same model of solder powder particle size as in the discussion on waferbumping paste, you can calculate a couple of potentially useful things:

i/ The maximum number of solder powder particles on each solder sphere (bump)

ii/ The mass of solder paste adhering to each soldersphere

The first (i/) is useful for establishing the inherent variability due to the finite size of the solder powder, and I’m going to suggest another Mackie rule of thumb of a minimum 150 solder powder particles per solder bump, based on the maximum allowed particle size (diameter). The table below gives  the result of this rather simplistic analysis:



Table: Effect of Package Bump Diameter on Solder Paste Type Needed

A 400micron bump should therefore be fine even with a type 3 dipping paste, whereas a 200micron bump will need a type 5 paste.

I look forward to someone proving this wrong. The second (ii/) is helpful, because we can easily use it to test the theoretical mass of PoP dipping paste against what we actually find. Note that this is just simple geometry: it doesn't tell us how much paste is really needed to resolve issues such as the 60 - 90micron bowing we are hearing about from our customers, even with the more rigid PoP packages currently available.

Cheers!  Andy

过去半年，因为某些国家的“宽松货币政策”大量印钞票，弄得和国际大宗商品的价格一路攀升。和我们行业直接相关的就是金属原材料的价格，特别是锡银铜的价格。

锡银铜是无铅合金的主要成分，虽然其中银在现在最常用的SAC305中只占3%，但是其价格的一路攀升，也使SAC305的金属成本价格随之一路狂飙！

为了更好为客户们提供具有成本优势(cost-effective)的可靠性强(reliable)的好用的焊接材料，Indium公司早就在低银合金上做了很多的研发，请看这里的相关Indium论文“Achieving High Reliability Low Cost Lead-Free SAC Solder Joints Via MN or CE Doping”

by Dr. Weiping Liu, Dr. Ning-Cheng Lee, Adriana Porras, Dr. Min Ding, Anthony Gallagher, Austin Huang, Scott Chen, Jeffrey Chan 

最近，我们的一些客户适用了Indium的SAC105 with Mn 焊锡膏（solder paste），发现其性能在各种应用上都表现良好(空焊盘，chip料，屏蔽罩，细IC间距，BGA等), 其印刷性，润湿性，爬锡，焊点的光亮度，BGA空洞的比例等，都和SAC305一样好或是十分接近。

更详细的资料或是信息，欢迎随时联系我们china@indium.com, askus@indium.com .

Cheers!

Pic:

1. www.kitco.com

2. Acknowledge to a South China customer; beta test pictures 

Folks,

I was at SMTAI (Surface Mount Technology Association International) from September 24 and 27, 2010.   As I mentioned, I chaired a session on Alternative Alloys from 2:00-3:30PM on Tuesday 26^th.

At this session, Greg Henshall presented a paper on the Low Silver BGA Sphere Metallurgy Project. This paper was a collaborative effort of six companies. In addition, Richard Coyle presented an overview of the work of three companies entitled The Effect of Silver Content on the Solder Joint Reliability of a Pb-free PBGA Package. Both of these projects evaluated lead-free thermal cycle reliability as a function of silver content and compared the results to tin-lead reliability.

Both papers concluded that as far as thermal cycle reliability is concerned SnPb<SAC105<SAC305< SAC405. Coyle’s paper summed it up the best:

Each of the SAC alloys outperformed the SnPb eutectic alloy in every test including the long, 60 minute dwell time test. This tends to diminish the argument that SAC is less reliable than SnPb. (See Coyle’s figure. Data curves to the right are more reliable.)

Henshall’s paper also showed that the addition of dopants, to improve shock resistance, in SAC105 does not reduce thermal cycle life.

So, it appears, at this time, that, from a thermal cycle and drop shock perspective, it is looking more and more like SAC based solders out perform tin-lead solders in these two reliability arenas.

At the end of the session a noted lead-free curmudgeon came over to introduce himself.  We have had a jovial disagreement on several blogs etc. in the past re: lead-free status and issues, but had not met in person.   I should mention that this person is a college graduate, a former technical leader at several influential technological companies, and he owns a PE license. I asked him what he now thought about lead-free reliability after hearing the talks. He claimed that he is a little less likely to think that lead-free reliability is a disaster. He still refuses to purchase any lead-free products. He buys old units (pre-2006) on eBay.

I mentioned that over $2 trillion of electronics has been placed in the field since 2006 with no unusual reliability issues.   I then went on to say that a RoHS-compliant product is much more likely to fail due to a non-RoHS related issue. He did not disagree. So then I asked him why he won’t use RoHS compliant electronics. His answer: “I just don’t trust them.”

Cheers,

常常会有客户在评估新一代的焊接材料， 或是因为要转无铅（Pb-free）焊接材料了，需要我们推荐最适合他们工艺生产的产品（美国这里有许多low volume high mixed的高精尖板子，都还是在用有铅SnPb材料的）。了解了客户们需要焊接的各种元器件后， 我们也会根据实际情况推荐3号金属粉或是4号金属粉的焊锡膏。 有时候，客户们也会迷惑，究竟是应该用3号粉的焊锡膏， 还是4号粉呢。

其实，钢网上的各种印刷孔，都需要最少4-5个金属粉球能够通过，这样才能保证回流后有足够的“金属”来形成可靠的焊点。3号粉的线径是25-45micron, 4号粉的线径是20-38micron; 其实这两者的powder vehicle 还是有相当大一部分的覆盖空间的。 如果你的印刷中有很多0201元件， micro BGA, 或是QFN， 那么很有可能要用到4号粉。 除此外， 一个焊锡膏中的paste flux，其实对焊接的印刷性，润湿性，抗空洞等各方面性能的表现，起到更大的影响作用。有些时候， 有好的paste flux的3号粉焊锡膏对微型元件的印刷，甚至比不好paste flux的4号粉焊锡膏，要表现得更理想。

当然，如果从成本的角度出发，因为4号粉比3号粉成本贵，卖价也贵；所以如果3号粉的焊锡膏适合客户的应用， 我们一般不会推荐4号粉的。这样也为客户在这个竞争激烈的市场中节省一点。

Cheers!

Pic: Indium Corporation

• Oxidation Barrie能夠大大減少，甚至完全消除枕窩效應(Head-in-Pillow defect). 枕窩效應是因爲BGA球和solder paste在回流前的preheat or soak time階段分開了，在熔融過程中，表面被氧化；儅BGA球和paste再次接觸時，表面被氧化層太厚了，所以整個焊點沒有完全融合好。如果有良好的Oxidation Barrier, 那麽能大大減少BGA球或是paste在熔融過程中因爲分開而被氧化。
   
• Oxidation Barrie 能夠提高精密元器件，小開口印刷的焊點的結合。小開口的下錫中，4號錫粉的表面積(powders’ surface area)其實是比3號粉增加了，但是助焊劑(paste flux)沒怎麽增加，那麽在焊接過程中，有些錫粉表面的氧化物可能就沒有被完全清洗乾淨。被氧化的錫粉不能和整個焊點完全融合，形成良好的焊接點；而是在焊點附近出現一串像葡萄一樣的小珠子，我們也叫做graping defect。 有了好的Oxidation Barrier, 就能夠更有效地預防graping defect, 提高小開孔印刷焊點的融合。
   
• Oxidation Barrie能夠減少留在電路板上的活化劑activator，增強電性能的可靠性。Oxidation Barrie 能夠防止焊接表面被氧化，activator是清洗表面被氧化的部分。如果有了良好的Oxidation Barrier，那麽activator 就可以相對減少。回流后留在電路板上的activator 也少了，那麽也減少short cut 等現象，提到電性能可靠性。
   

Cheers!

Pic: Indium Corporation

Included in the Product Data Sheet, among other things, are parameters which guide the customer in designing an SMT reflow profile. The data sheet gives general recommendations, for time above liquidus, peak temperature, and ramp rate.

The reason for addressing this subject is that, often, there has been some confusion in regard to the difference between max slope (a category reported on most profiling software) and the ramp rate listed on a data sheet.

The max slope is very often attained in the first zone as the PCB moves from ambient temperature into the oven. In most cases the oven zone setting for the first zone is 100°C or better. The change in temperature between ambient and the first zone then is a minimum of 75°C (assuming 25°C as ambient) and so it’s easy to see that the greatest change in temperature (max slope) in most cases is typically found in the first zone

The focus of max slope is more from a component view point, to avoid thermal shock, usually 3°C/s is recommended as the upper limit

The ramp rate may be better described as the rate (change in temperature over time) from ambient (room temperature) to peak. And is more practically used in a ramp-to-spike type profile

From the view point of the solder paste, a low ramp rate is desired, usually 1-2°C/s. This  gently evaporates volatiles and helps minimize solder defects such as solder balling, solder beading, and tombstoning. This rate becomes even more important as the solder paste deposit continually decreases in size - as we move to 0201’s and smaller and from 0.5mm pitch BGA’s. Due to this miniaturization, the emergence of a defect known as "graping" has also become fairly well known. The reflow process window is becoming very narrow and this attribute (ramp rate) has become as important as time above liquidus and peak temperature.

Patty, Rob, and The Professor finished their tasks in Shenzen and were flying to Shanghai for their last set of challenges in electronics assembly.  Then they would head back to the US, Rob and Patty being only a week away from their wedding day.

As usual Rob, conked out as soon as the plane lifted off. Surprisingly, The Professor also drifted off to sleep. Patty was too excited to sleep. Rob’s mother had given her and Rob their wedding presents early … an iPad  for each. They decided to bring only one laptop and one iPad. Patty was a little nervous about using the iPad for presentations but it worked quite well. She was still surprised that the iPad did not have a USB port. The Professor also gave each of them an early wedding present, a Pickett slide rule for Rob and a K&E slide rule for her. She must be the only person in the world right now that was watching a movie on an iPad and solving a math problem with a slide rule!

True to form, The Professor was passionate about how learning to use a slide rule helped improve a person's innate math ability. He showed Patty and Rob how to use them and gave them several assignments. Rob was better with his slide rule than Patty due to the amount of “one on one” time he had with The Professor. She had to admit that using the “slip stick” gave one more of a feel for calculations and it was consistent with one of The Professor’s adages: “Always know approximately what the answer to a calculation should be…..it will help you to avoid errors."

In addition to the iPad and slide rule, Patty was excited to be going to Shanghai at the time of the World Expo 2010. Our trio had scheduled some time at the expo into their busy schedule.

Their plan was for Rob and The Professor to work on some productivity issues and for Patty to take on some of the process materials related problems. The three of them again met with the site GM for ACME’s newly acquired plant in Shanghai, a Mr. Wong. Wong was relieved to find that they all spoke Mandarin, as his English was a little rough. When The Professor addressed him in excellent Shanghainese, everyone was speechless. Patty was determined to ask him about this later. No American spoke Mandarin, Cantonese, and Shanghainese!

They again agreed to stick to Mandarin. Patty headed out to the line, accompanied by a young Chinese engineer, Zhou Chang, who seemed to be taking more interest in her than expected. She tried to make her engagement ring visible, but she wasn’t sure the he knew of the significance of it. When she got to the line that was experiencing yield problems, the Engineering Manager, Fei Ding, met her. He showed her some of the fails and she quickly identified the head-in-pillow (HIP) defect as the likely culprit. After investigating some more fails, looking at stencil printing, some of the BGA components, and component placement, she asked Zhou Chang what spec was used to thermal profile the line.

“I don’t understand what you mean,” Zhou said in Mandarin.

“How do you determine what the reflow profile should be?”  Patty responded.

With more discussion, Patty determined that they had one profile for all products! Fortunately most of the products were of similar, small thermal mass.

“What solder paste do you use for this line?", Patty asked.

The embarrassed silence suggested that Zhou did not know! They grabbed a tube and Patty was relieved to see that it was one of her favor solder pastes. Since profiling was so rarely performed, Patty and Zhou had to go to another part of the complex almost a mile away to find a reflow profiling unit. After taking the profile, the likely solution appeared. The 11 zone oven was very long and the reflow profile had a long thermal  “soak” before the temperature went above liquidus. This long soak probably exhausted the flux, so that when the PWB went above liquidus, there was little flux left, resulting in oxidation and poor reflow.

All during their time together she had mentioned that her fiancé Rob was here, with her on the trip. This information seemed to do the trick.

“Zhou, why don’t you look up the solder paste spec on the web and then set up the right type reflow profile,” Patty suggested.

It was clear that Zhou was troubled. It became obvious to Patty that Zhou did not know how to profile a reflow oven. Patty set about working with Zhou to accomplish this mission. Within an hour they had re-profiled the oven and, over the next two hours, 300 PCBs were manufactured with the yield improved to 95%.

Patty asked Fei if she could give a brief presentation on the head-in-pillow defect to his team and he cheerfully agreed. Fortunately for Patty, her friend Mario Scalzo had given her his presentation that he gave at APEX 2010 on HIP (head-in-pillow). Patty always enjoyed visiting Mario in Utica, NY, as he always knew the best restaurants in town.

Her major points were:

HIP is caused by the failure of the BGA sphere to reflow with the solder paste. There are 3 major reasons for HIP:

1.       Supplier Issues

a.       Solder BGA sphere oxidation

b.      Silver segregation to the BGA sphere surface

2.       Process Issues

a.       Stencil Printing

                                                               i.      Registration accuracy

                                                             ii.      Insufficient solder paste

b.      Component Placement

                                                               i.      Off pad

                                                             ii.      Out of plane

                                                            iii.      Non optimum pressure

c.       Reflow

                                                               i.      Inappropriate reflow profile

                                                             ii.      Flux exhaustion

                                                            iii.      PWB warpage

3.       Material Issues

a.       Poor solder paste transfer efficiency

b.      Insufficient solder flux oxidation barrier

c.      Solder paste slump

d.      PWB or BGA warpage

Patty went on to say that she had investigated all of these issues with Zhou, and that the reflow profile was not optimum as the very long soak time had exhausted the flux. The other possible issues in the list did not seem to be a concern.

At the end of the day Patty, Rob, and The Professor met at the GM’s office to leave together for dinner and the Expo. Patty had to ask, “Professor, how can you possible know Mandarin, Cantonese, and Shanghainese?”

“Actually I speak Min reasonably well too,” he replied.

“How can this be?", Rob inquired.

“Mother and father were missionaries with Wycliffe Bible Translators,” The Professor answered.

“I grew about around many languages during my youth. Mother and father speak more than I do,” he finished.

Patty went on to tell about the interest that Zhou Chang seemed to have in her, and how she had to discourage him.

“The burdens of being a beautiful young woman,” Rob teased.

Patty elbowed him, but they all left the taxi laughing as they headed for a restaurant near the Expo.

Best Wishes,

Dr. Ron 

The Shanghai, slide rule, and HIP images are from: 

http://pool14.files.wordpress.com/2008/12/shanghai_skyline_g.jpg

http://www.hpmuseum.org/powerlog.jpg

http://ppsimanufacturing.files.wordpress.com/2010/03/bga100.gif

最後和大家分享空洞的審核標準以及監測空洞的方法。

根據IPC-A-610D, Class 1, 2, & 3 產品Acceptable的標準是： 25% or less voiding of the ball X-Ray image area.  請注意，這裡是指“X-Ray Image Area”, 是一個影像圖面積的佔有百分比，不是真實體積佔有的百分比。

在影像圖片中，很有可能有些空洞的影像被別的更大的空洞完全遮蓋住了，或是重疊了，所以沒有計算上。況且，正如上篇“空洞對可靠性的影響”所說的，空洞的大小很有可能沒有空洞所在的位置重要。 但是這個是目前業界最普遍的使用方法。

關於各種空洞的監測方法，Raiyo和大家詳細分析了這五种：

1.      2D Transmission X-Ray. 目前業界最流行的方法，但是正如Raiyo總結的，這種方法不能準確測出voids所在的位置，大小，數量等。

2.      3D CT X-Ray. 測試voids的黃金工具。但是慢，對大產量的生産，可能會成爲降低生産效率的瓶頸。

3.      X-Ray Laminography. 最快的測試方法。但是準確性有待提高，一般作爲大產量pass/fail的衡量工具。

4.      Cross-Section. 對焊點有破壞性，慢，通常在實驗室使用。

5.      Ball Shear. 常作爲檢測BGA package land to surface interface的voids工具。

至此，完結！  Cheers! 

Picture, table, and Reference: Raiyo’s SMTA Voids in Solder Joints Presentation

在上周SMTA Oregon Chapter會上，Intel公司的Raiyo Aspandiar給大家詳細講解了焊接點中的空洞Voids in Solder Joints。  Raiyo的講課中，大概分了這幾大類，我也分幾次和大家分享：

1．不同類型的空洞

2．不同空洞對可靠性的影響(Reliability Impact)

3．空洞的審核標準

4．監測空洞的方法

第一种類型的空洞叫Macro Voids. 主要是由於焊接材料中駐焊劑的各種化學成分，或是電路板/元件中的水蒸氣，在回流過程中的蒸發引起的。在它們蒸發的時候，這些氣體就會被困在熔融的焊點中，最後行成了空洞。 一般直徑在2 mil以上的空洞，定義為Macro Voids.

第二种類型的空洞叫Planar Microvoids. 這種空洞常在焊點和PCB面之間出現，主要是由於PCB的表面凃層(surface finishes)不豐滿，留下小洞(cave), 所以在焊接回流后，就形成了空洞。 這種空洞常常在ImAg的表面凃層板子上發現，特別是有solder mask的表面凃層板子。

第三种類型的空洞叫Shrinkage Voids.  主要是無鉛SAC合金造成的小裂痕。

第四种類型的空洞叫Micro-Via Voids.  儅在micro-via的地方有焊接材料的時候，via通孔中沒有被填充的地方在回流后，很容易形成空洞。如果印刷錫膏時來回印兩次，或是用更小的粉末(Type 4 powder), 能減少這類空洞的出現。

第五种類型的空洞叫IMC Microvoids.  在CuSn的IMC層中，過長時間的老化，或是過多的熱循環，都有可能增加IMC層的空洞。 業界也還在討論最終的成因。

第六种類型的空洞叫Pinhole Microvoids.  這類空洞常出現在IMC層上，很有可能由於PCB銅板原來的製造缺陷造成的。

Cheers!

Picture: Raiyo’s SMTA Voids in BGA Presentation

PS:

1．  儅Raiyo説到不同類型的空洞對焊接可靠性的影響時，他總結到“It’s not about size! It’s LOCATION LOCATION LOCATION!  I know I sound like a real estate agent. ” 哈哈，真的，他的語調和潘石屹的“地段，地段，地段”如出一轍！

2．  Raiyo Aspandiar 是Intel公司資深工藝工程師，負責組裝工藝。 他曾在行業内發表25篇論文和擁有15項美國專利。Raiyo也是SMTA的技術委員會成員，和榮獲2009年SMTA傑出技術獎！2005年，Raiyo在深圳IPC技術研討會上與大家分享過關于焊點中的空洞。 Raiyo的郵件是 raiyo.f.aspandiar@intel.com

經常在電視或是報紙上面看見和聽到各種評論，“改變人們生活的十大科技”，“ 改變人們生活的十大產品”， 諸如此類的。 很容易發現，各種十大都是大同小異，而且其中以電子產品，特別是消費電子產品或是其相關技術，佔了大半席位置：智能手機(Smart Phone),  音樂播放器(如iPod)，上網本(netbook)，電子書(e-reader),  等等！

十多年前，在中國擁有一款大哥大手機是很威風的事情。 現在，擁有一本iPad是年輕人們追逐的潮流。從磚頭重的大哥大到輕薄的iPad,  其中除了軟件技術的升級換代，在硬件方面，各種元器件/電路板的微型化和高集成化，還有焊接技術(Soldering Technology) 從通孔焊接(Through-Hole)到表面貼裝(SMT---Surface Mount Technology), 都功不可沒！

電子焊接材料，就是把所有的“會思考”的元器件，全部焊接到同一個電路板上(PWB---Printing Wiring Board)，使整個板子和各個部件組成一個“正常運行的大腦” 。如果有任何一個微小的元器件焊接有缺失，整個大腦都可能會失常。比如説手機摔了一次就失靈，或是電腦突然死機或是散熱有問題等，都很有可能是焊接的缺陷造成的。

以前的通孔焊接(現在某些電子產品還在使用，如VCD播放器)，一般元器件只有兩個腳(I/O)與電路板連接。現在的表面貼裝(SMT)技術，各種微型元件(PQFP, BGA, LGA, DIL等)的底部有密密麻麻的腳作爲I/O口。

表面貼裝(SMT)技術能使電路板更好地高密度，高性能，和微型化。雖然在材料和工藝的過程中還存在不少挑戰，但是技術的日新月日，人類克服困難的信心與行動，也使我們享用各種新科技成爲可能！  Cheers!

Pic:

1．  http://pic.nipic.com/2008-01-01/20081116477241_2.jpg     

2．  http://www.piroplastic.com/wp-content/uploads/2009/12/ipad-touch.jpg

3．  Indium Corporation